1 /* DO NOT EDIT THIS FILE
2 * Automatically generated by generate-def-headers.xsl
3 * DO NOT EDIT THIS FILE
6 #ifndef __BFIN_DEF_ADSP_BF518_proc__
7 #define __BFIN_DEF_ADSP_BF518_proc__
11 #define EMAC_PTP_CTL 0xFFC030A0 /* PTP Block Control */
12 #define EMAC_PTP_IE 0xFFC030A4 /* PTP Block Interrupt Enable */
13 #define EMAC_PTP_ISTAT 0xFFC030A8 /* PTP Block Interrupt Status */
14 #define EMAC_PTP_FOFF 0xFFC030AC /* PTP Filter offset Register */
15 #define EMAC_PTP_FV1 0xFFC030B0 /* PTP Filter Value Register 1 */
16 #define EMAC_PTP_FV2 0xFFC030B4 /* PTP Filter Value Register 2 */
17 #define EMAC_PTP_FV3 0xFFC030B8 /* PTP Filter Value Register 3 */
18 #define EMAC_PTP_ADDEND 0xFFC030BC /* PTP Addend for Frequency Compensation */
19 #define EMAC_PTP_ACCR 0xFFC030C0 /* PTP Accumulator for Frequency Compensation */
20 #define EMAC_PTP_OFFSET 0xFFC030C4 /* PTP Time Offset Register */
21 #define EMAC_PTP_TIMELO 0xFFC030C8 /* PTP Precision Clock Time Low */
22 #define EMAC_PTP_TIMEHI 0xFFC030CC /* PTP Precision Clock Time High */
23 #define EMAC_PTP_RXSNAPLO 0xFFC030D0 /* PTP Receive Snapshot Register Low */
24 #define EMAC_PTP_RXSNAPHI 0xFFC030D4 /* PTP Receive Snapshot Register High */
25 #define EMAC_PTP_TXSNAPLO 0xFFC030D8 /* PTP Transmit Snapshot Register Low */
26 #define EMAC_PTP_TXSNAPHI 0xFFC030DC /* PTP Transmit Snapshot Register High */
27 #define EMAC_PTP_ALARMLO 0xFFC030E0 /* PTP Alarm time Low */
28 #define EMAC_PTP_ALARMHI 0xFFC030E4 /* PTP Alarm time High */
29 #define EMAC_PTP_ID_OFF 0xFFC030E8 /* PTP Capture ID offset register */
30 #define EMAC_PTP_ID_SNAP 0xFFC030EC /* PTP Capture ID register */
31 #define EMAC_PTP_PPS_STARTLO 0xFFC030F0 /* PPS Start Time Low */
32 #define EMAC_PTP_PPS_STARTHI 0xFFC030F4 /* PPS Start Time High */
33 #define EMAC_PTP_PPS_PERIOD 0xFFC030F8 /* PPS Count Register */
35 #endif /* __BFIN_DEF_ADSP_BF518_proc__ */