2 * serial.h - common serial defines for early debug and serial driver.
3 * any functions defined here must be always_inline since
4 * initcode cannot have function calls.
6 * Copyright (c) 2004-2007 Analog Devices Inc.
8 * Licensed under the GPL-2 or later.
11 #ifndef __BFIN_CPU_SERIAL_H__
12 #define __BFIN_CPU_SERIAL_H__
14 #include <asm/blackfin.h>
15 #include <asm/mach-common/bits/uart.h>
17 #ifndef CONFIG_UART_CONSOLE
18 # define CONFIG_UART_CONSOLE 0
21 #ifdef CONFIG_DEBUG_EARLY_SERIAL
22 # define BFIN_DEBUG_EARLY_SERIAL 1
24 # define BFIN_DEBUG_EARLY_SERIAL 0
29 #include <asm/portmux.h>
31 #define LOB(x) ((x) & 0xFF)
32 #define HIB(x) (((x) >> 8) & 0xFF)
34 #if defined(__ADSPBF50x__) || defined(__ADSPBF54x__)
35 # define BFIN_UART_HW_VER 2
37 # define BFIN_UART_HW_VER 1
41 * All Blackfin system MMRs are padded to 32bits even if the register
42 * itself is only 16bits. So use a helper macro to streamline this.
44 #define __BFP(m) u16 m; u16 __pad_##m
45 struct bfin_mmr_serial {
46 #if BFIN_UART_HW_VER == 2
83 #define __PASTE_UART(num, pfx, sfx) pfx##num##_##sfx
84 #define _PASTE_UART(num, pfx, sfx) __PASTE_UART(num, pfx, sfx)
85 #define MMR_UART(n) _PASTE_UART(n, UART, DLL)
86 #define _P_UART(n, pin) _PASTE_UART(n, P_UART, pin)
87 #define P_UART(pin) _P_UART(CONFIG_UART_CONSOLE, pin)
90 # define UART_DLL MMR_UART(CONFIG_UART_CONSOLE)
92 # define UART0_DLL UART_DLL
93 # if CONFIG_UART_CONSOLE != 0
94 # error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
97 #define pUART ((volatile struct bfin_mmr_serial *)uart_base)
99 #if BFIN_UART_HW_VER == 2
100 # define ACCESS_LATCH()
101 # define ACCESS_PORT_IER()
103 # define ACCESS_LATCH() \
104 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
105 # define ACCESS_PORT_IER() \
106 bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
109 __attribute__((always_inline))
110 static inline void serial_do_portmux(void)
112 if (!BFIN_DEBUG_EARLY_SERIAL) {
113 const unsigned short pins[] = { P_UART(RX), P_UART(TX), 0, };
114 peripheral_request_list(pins, "bfin-uart");
118 #if defined(__ADSPBF50x__)
119 # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
120 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_1 | PORT_x_MUX_##mux_rx##_FUNC_1); \
121 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
122 switch (CONFIG_UART_CONSOLE) {
123 case 0: DO_MUX(G, 7, 7, 12, 13); break; /* Port G; mux 7; PG12 and PG13 */
124 case 1: DO_MUX(F, 3, 3, 6, 7); break; /* Port F; mux 3; PF6 and PF7 */
127 #elif defined(__ADSPBF51x__)
128 # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
129 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
130 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
131 switch (CONFIG_UART_CONSOLE) {
132 case 0: DO_MUX(G, 5, 5, 9, 10); break; /* Port G; mux 5; PG9 and PG10 */
133 case 1: DO_MUX(F, 2, 3, 14, 15); break; /* Port H; mux 2/3; PH14 and PH15 */
136 #elif defined(__ADSPBF52x__)
137 # define DO_MUX(port, mux, tx, rx) \
138 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
139 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
140 switch (CONFIG_UART_CONSOLE) {
141 case 0: DO_MUX(G, 2, 7, 8); break; /* Port G; mux 2; PG2 and PG8 */
142 case 1: DO_MUX(F, 5, 14, 15); break; /* Port F; mux 5; PF14 and PF15 */
145 #elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
146 const uint16_t func[] = { PFDE, PFTE, };
147 bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~func[CONFIG_UART_CONSOLE]);
148 bfin_write_PORTF_FER(bfin_read_PORTF_FER() |
149 (1 << P_IDENT(P_UART(RX))) |
150 (1 << P_IDENT(P_UART(TX))));
152 #elif defined(__ADSPBF54x__)
153 # define DO_MUX(port, tx, rx) \
154 bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
155 bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
156 switch (CONFIG_UART_CONSOLE) {
157 case 0: DO_MUX(E, 7, 8); break; /* Port E; PE7 and PE8 */
158 case 1: DO_MUX(H, 0, 1); break; /* Port H; PH0 and PH1 */
159 case 2: DO_MUX(B, 4, 5); break; /* Port B; PB4 and PB5 */
160 case 3: DO_MUX(B, 6, 7); break; /* Port B; PB6 and PB7 */
163 #elif defined(__ADSPBF561__)
164 /* UART pins could be GPIO, but they aren't pin muxed. */
166 # if (P_UART(RX) & P_DEFINED) || (P_UART(TX) & P_DEFINED)
167 # error "missing portmux logic for UART"
172 __attribute__((always_inline))
173 static inline int uart_init(uint32_t uart_base)
175 /* always enable UART -- avoids anomalies 05000309 and 05000350 */
176 bfin_write16(&pUART->gctl, UCEN);
178 /* Set LCR to Word Lengh 8-bit word select */
179 bfin_write16(&pUART->lcr, WLS_8);
186 __attribute__((always_inline))
187 static inline int serial_early_init(uint32_t uart_base)
189 /* handle portmux crap on different Blackfins */
192 return uart_init(uart_base);
195 __attribute__((always_inline))
196 static inline int serial_early_uninit(uint32_t uart_base)
198 /* disable the UART by clearing UCEN */
199 bfin_write16(&pUART->gctl, 0);
204 __attribute__((always_inline))
205 static inline void serial_early_put_div(uint32_t uart_base, uint16_t divisor)
207 /* Set DLAB in LCR to Access DLL and DLH */
211 /* Program the divisor to get the baud rate we want */
212 bfin_write16(&pUART->dll, LOB(divisor));
213 bfin_write16(&pUART->dlh, HIB(divisor));
216 /* Clear DLAB in LCR to Access THR RBR IER */
221 __attribute__((always_inline))
222 static inline uint16_t serial_early_get_div(void)
224 uint32_t uart_base = UART_DLL;
226 /* Set DLAB in LCR to Access DLL and DLH */
230 uint8_t dll = bfin_read16(&pUART->dll);
231 uint8_t dlh = bfin_read16(&pUART->dlh);
232 uint16_t divisor = (dlh << 8) | dll;
234 /* Clear DLAB in LCR to Access THR RBR IER */
241 /* We cannot use get_sclk() early on as it uses caches in external memory */
242 #if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
243 # define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
246 __attribute__((always_inline))
247 static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
249 /* Translate from baud into divisor in terms of SCLK. The
250 * weird multiplication is to make sure we over sample just
251 * a little rather than under sample the incoming signals.
253 serial_early_put_div(uart_base,
254 (get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
257 #ifndef BFIN_IN_INITCODE
258 __attribute__((always_inline))
259 static inline void serial_early_puts(const char *s)
261 if (BFIN_DEBUG_EARLY_SERIAL) {
262 serial_puts("Early: ");
270 .macro serial_early_init
271 #ifdef CONFIG_DEBUG_EARLY_SERIAL
272 call _serial_initialize;
276 .macro serial_early_set_baud
277 #ifdef CONFIG_DEBUG_EARLY_SERIAL
278 R0.L = LO(CONFIG_BAUDRATE);
279 R0.H = HI(CONFIG_BAUDRATE);
280 call _serial_set_baud;
284 /* Since we embed the string right into our .text section, we need
285 * to find its address. We do this by getting our PC and adding 2
286 * bytes (which is the length of the jump instruction). Then we
287 * pass this address to serial_puts().
289 #ifdef CONFIG_DEBUG_EARLY_SERIAL
290 # define serial_early_puts(str) \
303 # define serial_early_puts(str)