1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Linaro Ltd.
4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
12 * GPIO name legend: proper name = the GPIO line is used as GPIO
13 * NC = not connected (pin out but not routed from the chip to
15 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
16 * LSEC = Low Speed External Connector
17 * HSEC = High Speed External Connector
19 * Line names are taken from the schematic "sophon-edge-schematics"
22 * For the lines routed to the external connectors the
23 * lines are named after the 96Boards CE Specification 1.0,
24 * Appendix "Expansion Connector Signal Description".
26 * When the 96Board naming of a line and the schematic name of
27 * the same line are in conflict, the 96Board specification
28 * takes precedence. This is only for the informational
29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
30 * are the only ones actually used for GPIO.
34 compatible = "bitmain,sophon-edge", "bitmain,bm1880";
35 model = "Sophon Edge";
44 stdout-path = "serial0:115200n8";
48 device_type = "memory";
49 reg = <0x1 0x00000000 0x0 0x40000000>; // 1GB
53 compatible = "fixed-clock";
54 clock-frequency = <500000000>;
59 gpio0: gpio@50027000 {
60 porta: gpio-controller@0 {
62 "GPIO-A", /* GPIO0, LSEC pin 23 */
63 "GPIO-C", /* GPIO1, LSEC pin 25 */
64 "[GPIO2_PHY0_RST]", /* GPIO2 */
65 "GPIO-E", /* GPIO3, LSEC pin 27 */
66 "[USB_DET]", /* GPIO4 */
67 "[EN_P5V]", /* GPIO5 */
68 "[VDDIO_MS1_SEL]", /* GPIO6 */
69 "GPIO-G", /* GPIO7, LSEC pin 29 */
70 "[BM_TUSB_RST_L]", /* GPIO8 */
71 "[EN_P5V_USBHUB]", /* GPIO9 */
73 "LED_WIFI", /* GPIO11 */
74 "LED_BT", /* GPIO12 */
75 "[BM_BLM8221_EN_L]", /* GPIO13 */
97 gpio1: gpio@50027400 {
98 portb: gpio-controller@0 {
102 "[I2C0_SDA]", /* GPIO34, LSEC pin 17 */
103 "[I2C0_SCL]", /* GPIO35, LSEC pin 15 */
104 "[JTAG0_TDO]", /* GPIO36 */
105 "[JTAG0_TCK]", /* GPIO37 */
106 "[JTAG0_TDI]", /* GPIO38 */
107 "[JTAG0_TMS]", /* GPIO39 */
108 "[JTAG0_TRST_X]", /* GPIO40 */
109 "[JTAG1_TDO]", /* GPIO41 */
110 "[JTAG1_TCK]", /* GPIO42 */
111 "[JTAG1_TDI]", /* GPIO43 */
112 "[CPU_TX]", /* GPIO44 */
113 "[CPU_RX]", /* GPIO45 */
114 "[UART1_TXD]", /* GPIO46 */
115 "[UART1_RXD]", /* GPIO47 */
116 "[UART0_TXD]", /* GPIO48 */
117 "[UART0_RXD]", /* GPIO49 */
118 "GPIO-I", /* GPIO50, LSEC pin 31 */
119 "GPIO-K", /* GPIO51, LSEC pin 33 */
120 "USER_LED2", /* GPIO52 */
121 "USER_LED1", /* GPIO53 */
122 "[UART0_RTS]", /* GPIO54 */
123 "[UART0_CTS]", /* GPIO55 */
124 "USER_LED4", /* GPIO56, JTAG1_TRST_X */
125 "USER_LED3", /* GPIO57, JTAG1_TMS */
126 "[I2S0_SCLK]", /* GPIO58 */
127 "[I2S0_FS]", /* GPIO59 */
128 "[I2S0_SDI]", /* GPIO60 */
129 "[I2S0_SDO]", /* GPIO61 */
130 "GPIO-B", /* GPIO62, LSEC pin 24 */
131 "GPIO-F"; /* GPIO63, I2S1_SCLK, LSEC pin 28 */
135 gpio2: gpio@50027800 {
136 portc: gpio-controller@0 {
138 "GPIO-D", /* GPIO64, I2S1_FS, LSEC pin 26 */
139 "GPIO-J", /* GPIO65, I2S1_SDI, LSEC pin 32 */
140 "GPIO-H", /* GPIO66, I2S1_SDO, LSEC pin 30 */
141 "GPIO-L", /* GPIO67, LSEC pin 34 */
142 "[SPI0_CS]", /* GPIO68, SPI1_CS, LSEC pin 12 */
143 "[SPI0_DIN]", /* GPIO69, SPI1_SDI, LSEC pin 10 */
144 "[SPI0_DOUT]", /* GPIO70, SPI1_SDO, LSEC pin 14 */
145 "[SPI0_SCLK]"; /* GPIO71, SPI1_SCK, LSEC pin 8 */
152 pinctrl_uart0_default: pinctrl-uart0-default {
154 groups = "uart0_grp";
159 pinctrl_uart1_default: pinctrl-uart1-default {
161 groups = "uart1_grp";
166 pinctrl_uart2_default: pinctrl-uart2-default {
168 groups = "uart2_grp";
176 clocks = <&uart_clk>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_uart0_default>;
183 clocks = <&uart_clk>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_uart1_default>;
190 clocks = <&uart_clk>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_uart2_default>;