1 // SPDX-License-Identifier: GPL-2.0+
3 * (c) Copyright 2010-2017 Xilinx, Inc. All rights reserved.
4 * (c) Copyright 2016 Topic Embedded Products.
9 #include <asm/arch/sys_proto.h>
10 #include <asm/arch/ps7_init_gpl.h>
12 __weak int ps7_init(void)
15 * This function is overridden by the one in
16 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
21 __weak int ps7_post_config(void)
24 * This function is overridden by the one in
25 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
30 /* For delay calculation using global registers*/
31 #define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
32 #define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
33 #define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
34 #define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
35 #define APU_FREQ 666666666
37 #define PS7_MASK_POLL_TIME 100000000
39 /* IO accessors. No memory barriers desired. */
40 static inline void iowrite(unsigned long val, unsigned long addr)
42 __raw_writel(val, addr);
45 static inline unsigned long ioread(unsigned long addr)
47 return __raw_readl(addr);
51 static void perf_start_clock(void)
53 iowrite((1 << 0) | /* Timer Enable */
54 (1 << 3) | /* Auto-increment */
55 (0 << 8), /* Pre-scale */
56 SCU_GLOBAL_TIMER_CONTROL);
59 /* Compute mask for given delay in miliseconds*/
60 static unsigned long get_number_of_cycles_for_delay(unsigned long delay)
62 return (APU_FREQ / (2 * 1000)) * delay;
66 static void perf_disable_clock(void)
68 iowrite(0, SCU_GLOBAL_TIMER_CONTROL);
71 /* stop timer and reset timer count regs */
72 static void perf_reset_clock(void)
75 iowrite(0, SCU_GLOBAL_TIMER_COUNT_L32);
76 iowrite(0, SCU_GLOBAL_TIMER_COUNT_U32);
79 static void perf_reset_and_start_timer(void)
85 int __weak ps7_config(unsigned long *ps7_config_init)
87 unsigned long *ptr = ps7_config_init;
98 if (opcode == OPCODE_EXIT)
99 return PS7_INIT_SUCCESS;
100 addr = (opcode & OPCODE_ADDRESS_MASK);
102 switch (opcode & ~OPCODE_ADDRESS_MASK) {
103 case OPCODE_MASKWRITE:
107 iowrite((ioread(addr) & ~mask) | (val & mask), addr);
116 case OPCODE_MASKPOLL:
120 while (!(ioread(addr) & mask)) {
121 if (i == PS7_MASK_POLL_TIME)
122 return PS7_INIT_TIMEOUT;
127 case OPCODE_MASKDELAY:
130 delay = get_number_of_cycles_for_delay(mask);
131 perf_reset_and_start_timer();
132 while (ioread(addr) < delay)
137 return PS7_INIT_CORRUPT;
144 unsigned long __weak __maybe_unused ps7GetSiliconVersion(void)
146 return zynq_get_silicon_version();