2 * (c) Copyright 2010-2017 Xilinx, Inc. All rights reserved.
3 * (c) Copyright 2016 Topic Embedded Products.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/sys_proto.h>
11 #include <asm/arch/ps7_init_gpl.h>
13 __weak int ps7_init(void)
16 * This function is overridden by the one in
17 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
22 __weak int ps7_post_config(void)
25 * This function is overridden by the one in
26 * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists.
31 /* For delay calculation using global registers*/
32 #define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
33 #define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
34 #define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
35 #define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
36 #define APU_FREQ 666666666
38 #define PS7_MASK_POLL_TIME 100000000
40 /* IO accessors. No memory barriers desired. */
41 static inline void iowrite(unsigned long val, unsigned long addr)
43 __raw_writel(val, addr);
46 static inline unsigned long ioread(unsigned long addr)
48 return __raw_readl(addr);
52 static void perf_start_clock(void)
54 iowrite((1 << 0) | /* Timer Enable */
55 (1 << 3) | /* Auto-increment */
56 (0 << 8), /* Pre-scale */
57 SCU_GLOBAL_TIMER_CONTROL);
60 /* Compute mask for given delay in miliseconds*/
61 static int get_number_of_cycles_for_delay(unsigned int delay)
63 return (APU_FREQ / (2 * 1000)) * delay;
67 static void perf_disable_clock(void)
69 iowrite(0, SCU_GLOBAL_TIMER_CONTROL);
72 /* stop timer and reset timer count regs */
73 static void perf_reset_clock(void)
76 iowrite(0, SCU_GLOBAL_TIMER_COUNT_L32);
77 iowrite(0, SCU_GLOBAL_TIMER_COUNT_U32);
80 static void perf_reset_and_start_timer(void)
86 int __weak ps7_config(unsigned long *ps7_config_init)
88 unsigned long *ptr = ps7_config_init;
99 if (opcode == OPCODE_EXIT)
100 return PS7_INIT_SUCCESS;
101 addr = (opcode & OPCODE_ADDRESS_MASK);
103 switch (opcode & ~OPCODE_ADDRESS_MASK) {
104 case OPCODE_MASKWRITE:
108 iowrite((ioread(addr) & ~mask) | (val & mask), addr);
117 case OPCODE_MASKPOLL:
121 while (!(ioread(addr) & mask)) {
122 if (i == PS7_MASK_POLL_TIME)
123 return PS7_INIT_TIMEOUT;
128 case OPCODE_MASKDELAY:
131 delay = get_number_of_cycles_for_delay(mask);
132 perf_reset_and_start_timer();
133 while (ioread(addr) < delay)
138 return PS7_INIT_CORRUPT;
145 unsigned long __weak __maybe_unused ps7GetSiliconVersion(void)
147 return zynq_get_silicon_version();