arch/arm/mach-uniphier/dram_init.c

   1 /*
   2  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <libfdt.h>
   9 #include <linux/err.h>
  10
  11 DECLARE_GLOBAL_DATA_PTR;
  12
  13 static const void *get_memory_reg_prop(const void *fdt, int *lenp)
  14 {
  15         int offset;
  16
  17         offset = fdt_path_offset(fdt, "/memory");
  18         if (offset < 0)
  19                 return NULL;
  20
  21         return fdt_getprop(fdt, offset, "reg", lenp);
  22 }
  23
  24 int dram_init(void)
  25 {
  26         const void *fdt = gd->fdt_blob;
  27         const fdt32_t *val;
  28         int ac, sc, len;
  29
  30         ac = fdt_address_cells(fdt, 0);
  31         sc = fdt_size_cells(fdt, 0);
  32         if (ac < 0 || sc < 1 || sc > 2) {
  33                 printf("invalid address/size cells\n");
  34                 return -EINVAL;
  35         }
  36
  37         val = get_memory_reg_prop(fdt, &len);
  38         if (len / sizeof(*val) < ac + sc)
  39                 return -EINVAL;
  40
  41         val += ac;
  42
  43         gd->ram_size = sc == 2 ? fdt64_to_cpu(*(fdt64_t *)val) :
  44                                                         fdt32_to_cpu(*val);
  45
  46         debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
  47
  48         return 0;
  49 }
  50
  51 void dram_init_banksize(void)
  52 {
  53         const void *fdt = gd->fdt_blob;
  54         const fdt32_t *val;
  55         int ac, sc, cells, len, i;
  56
  57         val = get_memory_reg_prop(fdt, &len);
  58         if (len < 0)
  59                 return;
  60
  61         ac = fdt_address_cells(fdt, 0);
  62         sc = fdt_size_cells(fdt, 0);
  63         if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
  64                 printf("invalid address/size cells\n");
  65                 return;
  66         }
  67
  68         cells = ac + sc;
  69
  70         len /= sizeof(*val);
  71
  72         for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
  73              i++, len -= cells) {
  74                 gd->bd->bi_dram[i].start = ac == 2 ?
  75                         fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
  76                 val += ac;
  77                 gd->bd->bi_dram[i].size = sc == 2 ?
  78                         fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
  79                 val += sc;
  80
  81                 debug("DRAM bank %d: start = %08lx, size = %08lx\n",
  82                       i, (unsigned long)gd->bd->bi_dram[i].start,
  83                       (unsigned long)gd->bd->bi_dram[i].size);
  84         }
  85 }