1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * On-chip UART initializaion for low-level debugging
5 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
8 #include <linux/serial_reg.h>
9 #include <linux/linkage.h>
11 #include "../bcu/bcu-regs.h"
12 #include "../sc-regs.h"
13 #include "../sg-regs.h"
15 #if !defined(CONFIG_DEBUG_SEMIHOSTING)
16 #include CONFIG_DEBUG_LL_INCLUDE
19 #define BAUDRATE 115200
20 #define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
25 and r1, r1, #SG_REVISION_TYPE_MASK
26 mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT
28 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
29 #define UNIPHIER_LD4_UART_CLK 36864000
38 sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0
40 ldr r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE)
45 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
46 #define UNIPHIER_PRO4_UART_CLK 73728000
50 sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
52 ldr r0, =SG_LOADPINCTRL
58 orr r1, r1, #SC_CLKCTRL_CEN_PERI
61 ldr r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE)
66 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
67 #define UNIPHIER_SLD8_UART_CLK 80000000
76 sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0
78 ldr r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE)
83 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
84 #define UNIPHIER_PRO5_UART_CLK 73728000
88 sg_set_pinsel 47, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
89 sg_set_pinsel 49, 0, 4, 8, r0, r1 @ TXD1 -> TXD1
90 sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2
91 sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3
93 ldr r0, =SG_LOADPINCTRL
99 orr r1, r1, #SC_CLKCTRL_CEN_PERI
102 ldr r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE)
107 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
108 #define UNIPHIER_PXS2_UART_CLK 88900000
117 sg_set_pinsel 217, 8, 8, 4, r0, r1 @ TXD0 -> TXD0
118 sg_set_pinsel 115, 8, 8, 4, r0, r1 @ TXD1 -> TXD1
119 sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2
120 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3
124 orr r1, r1, #SC_CLKCTRL_CEN_PERI
127 ldr r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE)
132 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
133 #define UNIPHIER_LD6B_UART_CLK 88900000
142 sg_set_pinsel 135, 3, 8, 4, r0, r1 @ PORT10 -> TXD0
143 sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1
144 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2
148 orr r1, r1, #SC_CLKCTRL_CEN_PERI
151 ldr r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE)
160 mov r1, #UART_LCR_WLEN8 << 8
165 ENDPROC(debug_ll_init)