1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
6 /* Tegra vpr routines */
10 #include <asm/arch/tegra.h>
11 #include <asm/arch/mc.h>
12 #include <asm/arch-tegra/ap.h>
14 #include <fdt_support.h>
16 static bool _configured;
18 void tegra_gpu_config(void)
20 struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
22 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
23 if (!tegra_cpu_is_non_secure())
27 writel(0, &mc->mc_video_protect_size_mb);
28 writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
29 &mc->mc_video_protect_reg_ctrl);
30 /* read back to ensure the write went through */
31 readl(&mc->mc_video_protect_reg_ctrl);
34 debug("configured VPR\n");
39 #if defined(CONFIG_OF_LIBFDT)
41 int tegra_gpu_enable_node(void *blob, const char *compat)
48 offset = fdt_node_offset_by_compatible(blob, -1, compat);
49 while (offset != -FDT_ERR_NOTFOUND) {
50 fdt_status_okay(blob, offset);
51 offset = fdt_node_offset_by_compatible(blob, offset, compat);