2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <linux/compiler.h>
13 #include <linux/sizes.h>
15 #include <asm/arch/clock.h>
16 #include <asm/arch/funcmux.h>
17 #include <asm/arch/pinmux.h>
18 #include <asm/arch/pmu.h>
19 #include <asm/arch/tegra.h>
20 #include <asm/arch-tegra/ap.h>
21 #include <asm/arch-tegra/board.h>
22 #include <asm/arch-tegra/clk_rst.h>
23 #include <asm/arch-tegra/pmc.h>
24 #include <asm/arch-tegra/sys_proto.h>
25 #include <asm/arch-tegra/uart.h>
26 #include <asm/arch-tegra/warmboot.h>
27 #include <asm/arch-tegra/gpu.h>
28 #ifdef CONFIG_TEGRA_CLOCK_SCALING
29 #include <asm/arch/emc.h>
31 #include <asm/arch-tegra/usb.h>
32 #ifdef CONFIG_USB_EHCI_TEGRA
35 #ifdef CONFIG_TEGRA_MMC
36 #include <asm/arch-tegra/mmc.h>
38 #include <asm/arch-tegra/xusb-padctl.h>
39 #include <power/as3722.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 #ifdef CONFIG_SPL_BUILD
47 /* TODO(sjg@chromium.org): Remove once SPL supports device tree */
48 U_BOOT_DEVICE(tegra_gpios) = {
53 __weak void pinmux_init(void) {}
54 __weak void pin_mux_usb(void) {}
55 __weak void pin_mux_spi(void) {}
56 __weak void gpio_early_init_uart(void) {}
57 __weak void pin_mux_display(void) {}
58 __weak void start_cpu_fan(void) {}
60 #if defined(CONFIG_TEGRA_NAND)
61 __weak void pin_mux_nand(void)
63 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
68 * Routine: power_det_init
69 * Description: turn off power detects
71 static void power_det_init(void)
73 #if defined(CONFIG_TEGRA20)
74 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
76 /* turn off power detects */
77 writel(0, &pmc->pmc_pwr_det_latch);
78 writel(0, &pmc->pmc_pwr_det);
82 __weak int tegra_board_id(void)
87 #ifdef CONFIG_DISPLAY_BOARDINFO
90 int board_id = tegra_board_id();
92 printf("Board: %s", CONFIG_TEGRA_BOARD_STRING);
94 printf(", ID: %d\n", board_id);
99 #endif /* CONFIG_DISPLAY_BOARDINFO */
101 __weak int tegra_lcd_pmic_init(int board_it)
106 __weak int nvidia_board_init(void)
112 * Routine: board_init
113 * Description: Early hardware init.
117 __maybe_unused int err;
118 __maybe_unused int board_id;
120 /* Do clocks and UART first so that printf() works */
126 #ifdef CONFIG_TEGRA_SPI
130 /* Init is handled automatically in the driver-model case */
131 #if defined(CONFIG_DM_VIDEO)
134 /* boot param addr */
135 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
139 #ifdef CONFIG_SYS_I2C_TEGRA
140 # ifdef CONFIG_TEGRA_PMU
141 if (pmu_set_nominal())
142 debug("Failed to select nominal voltages\n");
143 # ifdef CONFIG_TEGRA_CLOCK_SCALING
144 err = board_emc_init();
146 debug("Memory controller init failed: %d\n", err);
148 # endif /* CONFIG_TEGRA_PMU */
149 #ifdef CONFIG_AS3722_POWER
150 err = as3722_init(NULL);
151 if (err && err != -ENODEV)
154 #endif /* CONFIG_SYS_I2C_TEGRA */
156 #ifdef CONFIG_USB_EHCI_TEGRA
160 #if defined(CONFIG_DM_VIDEO)
161 board_id = tegra_board_id();
162 err = tegra_lcd_pmic_init(board_id);
167 #ifdef CONFIG_TEGRA_NAND
171 tegra_xusb_padctl_init(gd->fdt_blob);
173 #ifdef CONFIG_TEGRA_LP0
174 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
175 warmboot_save_sdram_params();
177 /* prepare the WB code to LP0 location */
178 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
180 return nvidia_board_init();
183 #ifdef CONFIG_BOARD_EARLY_INIT_F
184 static void __gpio_early_init(void)
188 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
190 int board_early_init_f(void)
192 #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT)
193 #define USBCMD_FS2 (1 << 15)
195 struct usb_ctlr *usbctlr = (struct usb_ctlr *)0x7d000000;
196 writel(USBCMD_FS2, &usbctlr->usb_cmd);
200 /* Do any special system timer/TSC setup */
201 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
202 if (!tegra_cpu_is_non_secure())
209 /* Initialize periph GPIOs */
211 gpio_early_init_uart();
215 #endif /* EARLY_INIT */
217 int board_late_init(void)
219 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
220 if (tegra_cpu_is_non_secure()) {
221 printf("CPU is in NS mode\n");
222 setenv("cpu_ns_mode", "1");
224 setenv("cpu_ns_mode", "");
232 #if defined(CONFIG_TEGRA_MMC)
233 __weak void pin_mux_mmc(void)
237 /* this is a weak define that we are overriding */
238 int board_mmc_init(bd_t *bd)
240 debug("%s called\n", __func__);
242 /* Enable muxes, etc. for SDMMC controllers */
245 debug("%s: init MMC\n", __func__);
253 * In some SW environments, a memory carve-out exists to house a secure
254 * monitor, a trusted OS, and/or various statically allocated media buffers.
256 * This carveout exists at the highest possible address that is within a
257 * 32-bit physical address space.
259 * This function returns the total size of this carve-out. At present, the
260 * returned value is hard-coded for simplicity. In the future, it may be
261 * possible to determine the carve-out size:
262 * - By querying some run-time information source, such as:
263 * - A structure passed to U-Boot by earlier boot software.
265 * - A call into the secure monitor.
266 * - In the per-board U-Boot configuration header, based on knowledge of the
267 * SW environment that U-Boot is being built for.
269 * For now, we support two configurations in U-Boot:
270 * - 32-bit ports without any form of carve-out.
271 * - 64 bit ports which are assumed to use a carve-out of a conservatively
274 static ulong carveout_size(void)
284 * Determine the amount of usable RAM below 4GiB, taking into account any
285 * carve-out that may be assigned.
287 static ulong usable_ram_size_below_4g(void)
289 ulong total_size_below_4g;
290 ulong usable_size_below_4g;
293 * The total size of RAM below 4GiB is the lesser address of:
294 * (a) 2GiB itself (RAM starts at 2GiB, and 4GiB - 2GiB == 2GiB).
295 * (b) The size RAM physically present in the system.
297 if (gd->ram_size < SZ_2G)
298 total_size_below_4g = gd->ram_size;
300 total_size_below_4g = SZ_2G;
302 /* Calculate usable RAM by subtracting out any carve-out size */
303 usable_size_below_4g = total_size_below_4g - carveout_size();
305 return usable_size_below_4g;
309 * Represent all available RAM in either one or two banks.
311 * The first bank describes any usable RAM below 4GiB.
312 * The second bank describes any RAM above 4GiB.
314 * This split is driven by the following requirements:
315 * - The NVIDIA L4T kernel requires separate entries in the DT /memory/reg
316 * property for memory below and above the 4GiB boundary. The layout of that
317 * DT property is directly driven by the entries in the U-Boot bank array.
318 * - The potential existence of a carve-out at the end of RAM below 4GiB can
319 * only be represented using multiple banks.
321 * Explicitly removing the carve-out RAM from the bank entries makes the RAM
322 * layout a bit more obvious, e.g. when running "bdinfo" at the U-Boot
325 * This does mean that the DT U-Boot passes to the Linux kernel will not
326 * include this RAM in /memory/reg at all. An alternative would be to include
327 * all RAM in the U-Boot banks (and hence DT), and add a /memreserve/ node
328 * into DT to stop the kernel from using the RAM. IIUC, I don't /think/ the
329 * Linux kernel will ever need to access any RAM in* the carve-out via a CPU
330 * mapping, so either way is acceptable.
332 * On 32-bit systems, we never define a bank for RAM above 4GiB, since the
333 * start address of that bank cannot be represented in the 32-bit .size
336 void dram_init_banksize(void)
338 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
339 gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
342 gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
345 #ifdef CONFIG_PHYS_64BIT
346 if (gd->ram_size > SZ_2G) {
347 gd->bd->bi_dram[1].start = 0x100000000;
348 gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G;
352 gd->bd->bi_dram[1].start = 0;
353 gd->bd->bi_dram[1].size = 0;
358 * Most hardware on 64-bit Tegra is still restricted to DMA to the lower
359 * 32-bits of the physical address space. Cap the maximum usable RAM area
360 * at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit
361 * boundary that most devices can address. Also, don't let U-Boot use any
362 * carve-out, as mentioned above.
364 * This function is called before dram_init_banksize(), so we can't simply
365 * return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size.
367 ulong board_get_usable_ram_top(ulong total_size)
369 return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g();