1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2011
4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
10 #include <asm/arch/gpio.h>
12 void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
14 u32 index = GPIO_CFG_INDEX(bank_offset);
15 u32 offset = GPIO_CFG_OFFSET(bank_offset);
17 clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
20 void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
22 u32 bank = GPIO_BANK(pin);
23 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
25 sunxi_gpio_set_cfgbank(pio, pin, val);
28 int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
30 u32 index = GPIO_CFG_INDEX(bank_offset);
31 u32 offset = GPIO_CFG_OFFSET(bank_offset);
34 cfg = readl(&pio->cfg[0] + index);
40 int sunxi_gpio_get_cfgpin(u32 pin)
42 u32 bank = GPIO_BANK(pin);
43 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
45 return sunxi_gpio_get_cfgbank(pio, pin);
48 int sunxi_gpio_set_drv(u32 pin, u32 val)
50 u32 bank = GPIO_BANK(pin);
51 u32 index = GPIO_DRV_INDEX(pin);
52 u32 offset = GPIO_DRV_OFFSET(pin);
53 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
55 clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
60 int sunxi_gpio_set_pull(u32 pin, u32 val)
62 u32 bank = GPIO_BANK(pin);
63 u32 index = GPIO_PULL_INDEX(pin);
64 u32 offset = GPIO_PULL_OFFSET(pin);
65 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
67 clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);