arch/arm/mach-stm32mp/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
   4  */
   5
   6 #include <common.h>
   7 #include <cpu_func.h>
   8 #include <dm.h>
   9 #include <hang.h>
  10 #include <spl.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/sys_proto.h>
  13 #include <linux/libfdt.h>
  14
  15 u32 spl_boot_device(void)
  16 {
  17         u32 boot_mode;
  18
  19         boot_mode = get_bootmode();
  20
  21         switch (boot_mode) {
  22         case BOOT_FLASH_SD_1:
  23         case BOOT_FLASH_EMMC_1:
  24                 return BOOT_DEVICE_MMC1;
  25         case BOOT_FLASH_SD_2:
  26         case BOOT_FLASH_EMMC_2:
  27                 return BOOT_DEVICE_MMC2;
  28         case BOOT_SERIAL_UART_1:
  29         case BOOT_SERIAL_UART_2:
  30         case BOOT_SERIAL_UART_3:
  31         case BOOT_SERIAL_UART_4:
  32         case BOOT_SERIAL_UART_5:
  33         case BOOT_SERIAL_UART_6:
  34         case BOOT_SERIAL_UART_7:
  35         case BOOT_SERIAL_UART_8:
  36                 return BOOT_DEVICE_UART;
  37         case BOOT_SERIAL_USB_OTG:
  38                 return BOOT_DEVICE_USB;
  39         case BOOT_FLASH_NAND_FMC:
  40                 return BOOT_DEVICE_NAND;
  41         case BOOT_FLASH_NOR_QSPI:
  42                 return BOOT_DEVICE_SPI;
  43         case BOOT_FLASH_SPINAND_1:
  44                 return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
  45         }
  46
  47         return BOOT_DEVICE_MMC1;
  48 }
  49
  50 u32 spl_mmc_boot_mode(const u32 boot_device)
  51 {
  52         return MMCSD_MODE_RAW;
  53 }
  54
  55 int spl_mmc_boot_partition(const u32 boot_device)
  56 {
  57         switch (boot_device) {
  58         case BOOT_DEVICE_MMC1:
  59                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
  60         case BOOT_DEVICE_MMC2:
  61                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
  62         default:
  63                 return -EINVAL;
  64         }
  65 }
  66
  67 #ifdef CONFIG_SPL_DISPLAY_PRINT
  68 void spl_display_print(void)
  69 {
  70         DECLARE_GLOBAL_DATA_PTR;
  71         const char *model;
  72
  73         /* same code than show_board_info() but not compiled for SPL
  74          * see CONFIG_DISPLAY_BOARDINFO & common/board_info.c
  75          */
  76         model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
  77         if (model)
  78                 printf("Model: %s\n", model);
  79 }
  80 #endif
  81
  82 __weak int board_early_init_f(void)
  83 {
  84         return 0;
  85 }
  86
  87 void board_init_f(ulong dummy)
  88 {
  89         struct udevice *dev;
  90         int ret;
  91
  92         arch_cpu_init();
  93
  94         ret = spl_early_init();
  95         if (ret) {
  96                 debug("spl_early_init() failed: %d\n", ret);
  97                 hang();
  98         }
  99
 100         ret = uclass_get_device(UCLASS_CLK, 0, &dev);
 101         if (ret) {
 102                 debug("Clock init failed: %d\n", ret);
 103                 hang();
 104         }
 105
 106         ret = uclass_get_device(UCLASS_RESET, 0, &dev);
 107         if (ret) {
 108                 debug("Reset init failed: %d\n", ret);
 109                 hang();
 110         }
 111
 112         ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
 113         if (ret) {
 114                 debug("%s: Cannot find pinctrl device\n", __func__);
 115                 hang();
 116         }
 117
 118         /* enable console uart printing */
 119         preloader_console_init();
 120
 121         ret = board_early_init_f();
 122         if (ret) {
 123                 debug("board_early_init_f() failed: %d\n", ret);
 124                 hang();
 125         }
 126
 127         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 128         if (ret) {
 129                 printf("DRAM init failed: %d\n", ret);
 130                 hang();
 131         }
 132
 133         /*
 134          * activate cache on DDR only when DDR is fully initialized
 135          * to avoid speculative access and issue in get_ram_size()
 136          */
 137         if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
 138                 mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
 139                                                 DCACHE_DEFAULT_OPTION);
 140 }
 141
 142 void spl_board_prepare_for_boot(void)
 143 {
 144         dcache_disable();
 145 }
 146
 147 void spl_board_prepare_for_boot_linux(void)
 148 {
 149         dcache_disable();
 150 }