1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
11 #include <power/pmic.h>
12 #include <power/regulator.h>
14 #define STM32MP_PWR_CR3 0xc
15 #define STM32MP_PWR_CR3_USB33DEN BIT(24)
16 #define STM32MP_PWR_CR3_USB33RDY BIT(26)
17 #define STM32MP_PWR_CR3_REG18DEN BIT(28)
18 #define STM32MP_PWR_CR3_REG18RDY BIT(29)
19 #define STM32MP_PWR_CR3_REG11DEN BIT(30)
20 #define STM32MP_PWR_CR3_REG11RDY BIT(31)
22 struct stm32mp_pwr_reg_info {
28 struct stm32mp_pwr_priv {
29 struct regmap *regmap;
32 static int stm32mp_pwr_write(struct udevice *dev, uint reg,
33 const uint8_t *buff, int len)
35 struct stm32mp_pwr_priv *priv = dev_get_priv(dev);
36 u32 val = *(u32 *)buff;
41 return regmap_write(priv->regmap, STM32MP_PWR_CR3, val);
44 static int stm32mp_pwr_read(struct udevice *dev, uint reg, uint8_t *buff,
47 struct stm32mp_pwr_priv *priv = dev_get_priv(dev);
52 return regmap_read(priv->regmap, STM32MP_PWR_CR3, (u32 *)buff);
55 static int stm32mp_pwr_ofdata_to_platdata(struct udevice *dev)
57 struct stm32mp_pwr_priv *priv = dev_get_priv(dev);
58 struct regmap *regmap;
60 regmap = syscon_get_regmap_by_driver_data(STM32MP_SYSCON_PWR);
62 pr_err("%s: unable to find regmap (%ld)\n", __func__,
64 return PTR_ERR(regmap);
66 priv->regmap = regmap;
71 static const struct pmic_child_info pwr_children_info[] = {
72 { .prefix = "reg", .driver = "stm32mp_pwr_regulator"},
73 { .prefix = "usb", .driver = "stm32mp_pwr_regulator"},
77 static int stm32mp_pwr_bind(struct udevice *dev)
81 children = pmic_bind_children(dev, dev->node, pwr_children_info);
83 dev_dbg(dev, "no child found\n");
88 static struct dm_pmic_ops stm32mp_pwr_ops = {
89 .read = stm32mp_pwr_read,
90 .write = stm32mp_pwr_write,
93 static const struct udevice_id stm32mp_pwr_ids[] = {
94 { .compatible = "st,stm32mp1,pwr-reg" },
98 U_BOOT_DRIVER(stm32mp_pwr_pmic) = {
99 .name = "stm32mp_pwr_pmic",
101 .of_match = stm32mp_pwr_ids,
102 .bind = stm32mp_pwr_bind,
103 .ops = &stm32mp_pwr_ops,
104 .ofdata_to_platdata = stm32mp_pwr_ofdata_to_platdata,
105 .priv_auto_alloc_size = sizeof(struct stm32mp_pwr_priv),
108 static const struct stm32mp_pwr_reg_info stm32mp_pwr_reg11 = {
109 .enable = STM32MP_PWR_CR3_REG11DEN,
110 .ready = STM32MP_PWR_CR3_REG11RDY,
114 static const struct stm32mp_pwr_reg_info stm32mp_pwr_reg18 = {
115 .enable = STM32MP_PWR_CR3_REG18DEN,
116 .ready = STM32MP_PWR_CR3_REG18RDY,
120 static const struct stm32mp_pwr_reg_info stm32mp_pwr_usb33 = {
121 .enable = STM32MP_PWR_CR3_USB33DEN,
122 .ready = STM32MP_PWR_CR3_USB33RDY,
126 static const struct stm32mp_pwr_reg_info *stm32mp_pwr_reg_infos[] = {
133 static int stm32mp_pwr_regulator_probe(struct udevice *dev)
135 const struct stm32mp_pwr_reg_info **p = stm32mp_pwr_reg_infos;
136 struct dm_regulator_uclass_platdata *uc_pdata;
138 uc_pdata = dev_get_uclass_platdata(dev);
143 rc = dev_read_stringlist_search(dev, "regulator-name",
146 dev_dbg(dev, "found regulator %s\n", (*p)->name);
148 } else if (rc != -ENODATA) {
157 dev_dbg(dev, "regulator ");
158 while (dev_read_string_index(dev, "regulator-name",
160 dev_dbg(dev, "%s'%s' ", (i > 1) ? ", " : "", s);
161 dev_dbg(dev, "%s not supported\n", (i > 2) ? "are" : "is");
165 uc_pdata->type = REGULATOR_TYPE_FIXED;
166 dev->priv = (void *)*p;
171 static int stm32mp_pwr_regulator_set_value(struct udevice *dev, int uV)
173 struct dm_regulator_uclass_platdata *uc_pdata;
175 uc_pdata = dev_get_uclass_platdata(dev);
179 if (uc_pdata->min_uV != uV) {
180 dev_dbg(dev, "Invalid uV=%d for: %s\n", uV, uc_pdata->name);
187 static int stm32mp_pwr_regulator_get_value(struct udevice *dev)
189 struct dm_regulator_uclass_platdata *uc_pdata;
191 uc_pdata = dev_get_uclass_platdata(dev);
195 if (uc_pdata->min_uV != uc_pdata->max_uV) {
196 dev_dbg(dev, "Invalid constraints for: %s\n", uc_pdata->name);
200 return uc_pdata->min_uV;
203 static int stm32mp_pwr_regulator_get_enable(struct udevice *dev)
205 const struct stm32mp_pwr_reg_info *p = dev_get_priv(dev);
209 rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg));
213 dev_dbg(dev, "%s id %s\n", p->name, (reg & p->enable) ? "on" : "off");
215 return (reg & p->enable) != 0;
218 static int stm32mp_pwr_regulator_set_enable(struct udevice *dev, bool enable)
220 const struct stm32mp_pwr_reg_info *p = dev_get_priv(dev);
225 dev_dbg(dev, "Turning %s %s\n", enable ? "on" : "off", p->name);
227 rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg));
231 /* if regulator is already in the wanted state, nothing to do */
232 if (!!(reg & p->enable) == enable)
239 rc = pmic_write(dev->parent, 0, (uint8_t *)®, sizeof(reg));
246 /* waiting ready for enable */
247 time_start = get_timer(0);
249 rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg));
254 if (get_timer(time_start) > CONFIG_SYS_HZ) {
255 dev_dbg(dev, "%s: timeout\n", p->name);
262 static const struct dm_regulator_ops stm32mp_pwr_regulator_ops = {
263 .set_value = stm32mp_pwr_regulator_set_value,
264 .get_value = stm32mp_pwr_regulator_get_value,
265 .get_enable = stm32mp_pwr_regulator_get_enable,
266 .set_enable = stm32mp_pwr_regulator_set_enable,
269 U_BOOT_DRIVER(stm32mp_pwr_regulator) = {
270 .name = "stm32mp_pwr_regulator",
271 .id = UCLASS_REGULATOR,
272 .ops = &stm32mp_pwr_regulator_ops,
273 .probe = stm32mp_pwr_regulator_probe,