arch/arm/mach-stm32mp/bsec.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
   4  */
   5
   6 #include <common.h>
   7 #include <dm.h>
   8 #include <misc.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/stm32mp1_smc.h>
  11 #include <linux/arm-smccc.h>
  12 #include <linux/iopoll.h>
  13
  14 #define BSEC_OTP_MAX_VALUE              95
  15
  16 #ifndef CONFIG_STM32MP1_TRUSTED
  17 #define BSEC_TIMEOUT_US                 10000
  18
  19 /* BSEC REGISTER OFFSET (base relative) */
  20 #define BSEC_OTP_CONF_OFF               0x000
  21 #define BSEC_OTP_CTRL_OFF               0x004
  22 #define BSEC_OTP_WRDATA_OFF             0x008
  23 #define BSEC_OTP_STATUS_OFF             0x00C
  24 #define BSEC_OTP_LOCK_OFF               0x010
  25 #define BSEC_DISTURBED_OFF              0x01C
  26 #define BSEC_ERROR_OFF                  0x034
  27 #define BSEC_SPLOCK_OFF                 0x064 /* Program safmem sticky lock */
  28 #define BSEC_SWLOCK_OFF                 0x07C /* write in OTP sticky lock */
  29 #define BSEC_SRLOCK_OFF                 0x094 /* shadowing sticky lock */
  30 #define BSEC_OTP_DATA_OFF               0x200
  31
  32 /* BSEC_CONFIGURATION Register MASK */
  33 #define BSEC_CONF_POWER_UP              0x001
  34
  35 /* BSEC_CONTROL Register */
  36 #define BSEC_READ                       0x000
  37 #define BSEC_WRITE                      0x100
  38
  39 /* LOCK Register */
  40 #define OTP_LOCK_MASK                   0x1F
  41 #define OTP_LOCK_BANK_SHIFT             0x05
  42 #define OTP_LOCK_BIT_MASK               0x01
  43
  44 /* STATUS Register */
  45 #define BSEC_MODE_BUSY_MASK             0x08
  46 #define BSEC_MODE_PROGFAIL_MASK         0x10
  47 #define BSEC_MODE_PWR_MASK              0x20
  48
  49 /*
  50  * OTP Lock services definition
  51  * Value must corresponding to the bit number in the register
  52  */
  53 #define BSEC_LOCK_PROGRAM               0x04
  54
  55 /**
  56  * bsec_check_error() - Check status of one otp
  57  * @base: base address of bsec IP
  58  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
  59  * Return: 0 if no error, -EAGAIN or -ENOTSUPP
  60  */
  61 static u32 bsec_check_error(u32 base, u32 otp)
  62 {
  63         u32 bit;
  64         u32 bank;
  65
  66         bit = 1 << (otp & OTP_LOCK_MASK);
  67         bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
  68
  69         if (readl(base + BSEC_DISTURBED_OFF + bank) & bit)
  70                 return -EAGAIN;
  71         else if (readl(base + BSEC_ERROR_OFF + bank) & bit)
  72                 return -ENOTSUPP;
  73
  74         return 0;
  75 }
  76
  77 /**
  78  * bsec_lock() - manage lock for each type SR/SP/SW
  79  * @address: address of bsec IP register
  80  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
  81  * Return: true if locked else false
  82  */
  83 static bool bsec_read_lock(u32 address, u32 otp)
  84 {
  85         u32 bit;
  86         u32 bank;
  87
  88         bit = 1 << (otp & OTP_LOCK_MASK);
  89         bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
  90
  91         return !!(readl(address + bank) & bit);
  92 }
  93
  94 /**
  95  * bsec_read_SR_lock() - read SR lock (Shadowing)
  96  * @base: base address of bsec IP
  97  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
  98  * Return: true if locked else false
  99  */
 100 static bool bsec_read_SR_lock(u32 base, u32 otp)
 101 {
 102         return bsec_read_lock(base + BSEC_SRLOCK_OFF, otp);
 103 }
 104
 105 /**
 106  * bsec_read_SP_lock() - read SP lock (program Lock)
 107  * @base: base address of bsec IP
 108  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 109  * Return: true if locked else false
 110  */
 111 static bool bsec_read_SP_lock(u32 base, u32 otp)
 112 {
 113         return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp);
 114 }
 115
 116 /**
 117  * bsec_SW_lock() - manage SW lock (Write in Shadow)
 118  * @base: base address of bsec IP
 119  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 120  * Return: true if locked else false
 121  */
 122 static bool bsec_read_SW_lock(u32 base, u32 otp)
 123 {
 124         return bsec_read_lock(base + BSEC_SWLOCK_OFF, otp);
 125 }
 126
 127 /**
 128  * bsec_power_safmem() - Activate or deactivate safmem power
 129  * @base: base address of bsec IP
 130  * @power: true to power up , false to power down
 131  * Return: 0 if succeed
 132  */
 133 static int bsec_power_safmem(u32 base, bool power)
 134 {
 135         u32 val;
 136         u32 mask;
 137
 138         if (power) {
 139                 setbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP);
 140                 mask = BSEC_MODE_PWR_MASK;
 141         } else {
 142                 clrbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP);
 143                 mask = 0;
 144         }
 145
 146         /* waiting loop */
 147         return readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 148                                   val, (val & BSEC_MODE_PWR_MASK) == mask,
 149                                   BSEC_TIMEOUT_US);
 150 }
 151
 152 /**
 153  * bsec_shadow_register() - copy safmen otp to bsec data
 154  * @base: base address of bsec IP
 155  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 156  * Return: 0 if no error
 157  */
 158 static int bsec_shadow_register(u32 base, u32 otp)
 159 {
 160         u32 val;
 161         int ret;
 162         bool power_up = false;
 163
 164         /* check if shadowing of otp is locked */
 165         if (bsec_read_SR_lock(base, otp))
 166                 pr_debug("bsec : OTP %d is locked and refreshed with 0\n", otp);
 167
 168         /* check if safemem is power up */
 169         val = readl(base + BSEC_OTP_STATUS_OFF);
 170         if (!(val & BSEC_MODE_PWR_MASK)) {
 171                 ret = bsec_power_safmem(base, true);
 172                 if (ret)
 173                         return ret;
 174                 power_up = true;
 175         }
 176         /* set BSEC_OTP_CTRL_OFF with the otp value*/
 177         writel(otp | BSEC_READ, base + BSEC_OTP_CTRL_OFF);
 178
 179         /* check otp status*/
 180         ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 181                                  val, (val & BSEC_MODE_BUSY_MASK) == 0,
 182                                  BSEC_TIMEOUT_US);
 183         if (ret)
 184                 return ret;
 185
 186         ret = bsec_check_error(base, otp);
 187
 188         if (power_up)
 189                 bsec_power_safmem(base, false);
 190
 191         return ret;
 192 }
 193
 194 /**
 195  * bsec_read_shadow() - read an otp data value from shadow
 196  * @base: base address of bsec IP
 197  * @val: read value
 198  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 199  * Return: 0 if no error
 200  */
 201 static int bsec_read_shadow(u32 base, u32 *val, u32 otp)
 202 {
 203         *val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
 204
 205         return bsec_check_error(base, otp);
 206 }
 207
 208 /**
 209  * bsec_write_shadow() - write value in BSEC data register in shadow
 210  * @base: base address of bsec IP
 211  * @val: value to write
 212  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 213  * Return: 0 if no error
 214  */
 215 static int bsec_write_shadow(u32 base, u32 val, u32 otp)
 216 {
 217         /* check if programming of otp is locked */
 218         if (bsec_read_SW_lock(base, otp))
 219                 pr_debug("bsec : OTP %d is lock, write will be ignore\n", otp);
 220
 221         writel(val, base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
 222
 223         return bsec_check_error(base, otp);
 224 }
 225
 226 /**
 227  * bsec_program_otp() - program a bit in SAFMEM
 228  * @base: base address of bsec IP
 229  * @val: value to program
 230  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 231  * after the function the otp data is not refreshed in shadow
 232  * Return: 0 if no error
 233  */
 234 static int bsec_program_otp(long base, u32 val, u32 otp)
 235 {
 236         u32 ret;
 237         bool power_up = false;
 238
 239         if (bsec_read_SP_lock(base, otp))
 240                 pr_debug("bsec : OTP %d locked, prog will be ignore\n", otp);
 241
 242         if (readl(base + BSEC_OTP_LOCK_OFF) & (1 << BSEC_LOCK_PROGRAM))
 243                 pr_debug("bsec : Global lock, prog will be ignore\n");
 244
 245         /* check if safemem is power up */
 246         if (!(readl(base + BSEC_OTP_STATUS_OFF) & BSEC_MODE_PWR_MASK)) {
 247                 ret = bsec_power_safmem(base, true);
 248                 if (ret)
 249                         return ret;
 250
 251                 power_up = true;
 252         }
 253         /* set value in write register*/
 254         writel(val, base + BSEC_OTP_WRDATA_OFF);
 255
 256         /* set BSEC_OTP_CTRL_OFF with the otp value */
 257         writel(otp | BSEC_WRITE, base + BSEC_OTP_CTRL_OFF);
 258
 259         /* check otp status*/
 260         ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 261                                  val, (val & BSEC_MODE_BUSY_MASK) == 0,
 262                                  BSEC_TIMEOUT_US);
 263         if (ret)
 264                 return ret;
 265
 266         if (val & BSEC_MODE_PROGFAIL_MASK)
 267                 ret = -EACCES;
 268         else
 269                 ret = bsec_check_error(base, otp);
 270
 271         if (power_up)
 272                 bsec_power_safmem(base, false);
 273
 274         return ret;
 275 }
 276 #endif /* CONFIG_STM32MP1_TRUSTED */
 277
 278 /* BSEC MISC driver *******************************************************/
 279 struct stm32mp_bsec_platdata {
 280         u32 base;
 281 };
 282
 283 static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
 284 {
 285 #ifdef CONFIG_STM32MP1_TRUSTED
 286         return stm32_smc(STM32_SMC_BSEC,
 287                          STM32_SMC_READ_OTP,
 288                          otp, 0, val);
 289 #else
 290         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 291         u32 tmp_data = 0;
 292         int ret;
 293
 294         /* read current shadow value */
 295         ret = bsec_read_shadow(plat->base, &tmp_data, otp);
 296         if (ret)
 297                 return ret;
 298
 299         /* copy otp in shadow */
 300         ret = bsec_shadow_register(plat->base, otp);
 301         if (ret)
 302                 return ret;
 303
 304         ret = bsec_read_shadow(plat->base, val, otp);
 305         if (ret)
 306                 return ret;
 307
 308         /* restore shadow value */
 309         ret = bsec_write_shadow(plat->base, tmp_data, otp);
 310         return ret;
 311 #endif
 312 }
 313
 314 static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp)
 315 {
 316 #ifdef CONFIG_STM32MP1_TRUSTED
 317         return stm32_smc(STM32_SMC_BSEC,
 318                          STM32_SMC_READ_SHADOW,
 319                          otp, 0, val);
 320 #else
 321         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 322
 323         return bsec_read_shadow(plat->base, val, otp);
 324 #endif
 325 }
 326
 327 static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
 328 {
 329 #ifdef CONFIG_STM32MP1_TRUSTED
 330         return stm32_smc_exec(STM32_SMC_BSEC,
 331                               STM32_SMC_PROG_OTP,
 332                               otp, val);
 333 #else
 334         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 335
 336         return bsec_program_otp(plat->base, val, otp);
 337 #endif
 338 }
 339
 340 static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
 341 {
 342 #ifdef CONFIG_STM32MP1_TRUSTED
 343         return stm32_smc_exec(STM32_SMC_BSEC,
 344                               STM32_SMC_WRITE_SHADOW,
 345                               otp, val);
 346 #else
 347         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 348
 349         return bsec_write_shadow(plat->base, val, otp);
 350 #endif
 351 }
 352
 353 static int stm32mp_bsec_read(struct udevice *dev, int offset,
 354                              void *buf, int size)
 355 {
 356         int ret;
 357         int i;
 358         bool shadow = true;
 359         int nb_otp = size / sizeof(u32);
 360         int otp;
 361         unsigned int offs = offset;
 362
 363         if (offs >= STM32_BSEC_OTP_OFFSET) {
 364                 offs -= STM32_BSEC_OTP_OFFSET;
 365                 shadow = false;
 366         }
 367         otp = offs / sizeof(u32);
 368
 369         if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) {
 370                 dev_err(dev, "wrong value for otp, max value : %i\n",
 371                         BSEC_OTP_MAX_VALUE);
 372                 return -EINVAL;
 373         }
 374
 375         for (i = otp; i < (otp + nb_otp); i++) {
 376                 u32 *addr = &((u32 *)buf)[i - otp];
 377
 378                 if (shadow)
 379                         ret = stm32mp_bsec_read_shadow(dev, addr, i);
 380                 else
 381                         ret = stm32mp_bsec_read_otp(dev, addr, i);
 382
 383                 if (ret)
 384                         break;
 385         }
 386         return ret;
 387 }
 388
 389 static int stm32mp_bsec_write(struct udevice *dev, int offset,
 390                               const void *buf, int size)
 391 {
 392         int ret = 0;
 393         int i;
 394         bool shadow = true;
 395         int nb_otp = size / sizeof(u32);
 396         int otp;
 397         unsigned int offs = offset;
 398
 399         if (offs >= STM32_BSEC_OTP_OFFSET) {
 400                 offs -= STM32_BSEC_OTP_OFFSET;
 401                 shadow = false;
 402         }
 403         otp = offs / sizeof(u32);
 404
 405         if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) {
 406                 dev_err(dev, "wrong value for otp, max value : %d\n",
 407                         BSEC_OTP_MAX_VALUE);
 408                 return -EINVAL;
 409         }
 410
 411         for (i = otp; i < otp + nb_otp; i++) {
 412                 u32 *val = &((u32 *)buf)[i - otp];
 413
 414                 if (shadow)
 415                         ret = stm32mp_bsec_write_shadow(dev, *val, i);
 416                 else
 417                         ret = stm32mp_bsec_write_otp(dev, *val, i);
 418                 if (ret)
 419                         break;
 420         }
 421         return ret;
 422 }
 423
 424 static const struct misc_ops stm32mp_bsec_ops = {
 425         .read = stm32mp_bsec_read,
 426         .write = stm32mp_bsec_write,
 427 };
 428
 429 static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
 430 {
 431         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 432
 433         plat->base = (u32)dev_read_addr_ptr(dev);
 434
 435         return 0;
 436 }
 437
 438 #ifndef CONFIG_STM32MP1_TRUSTED
 439 static int stm32mp_bsec_probe(struct udevice *dev)
 440 {
 441         int otp;
 442         struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
 443
 444         /* update unlocked shadow for OTP cleared by the rom code */
 445         for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
 446                 if (!bsec_read_SR_lock(plat->base, otp))
 447                         bsec_shadow_register(plat->base, otp);
 448
 449         return 0;
 450 }
 451 #endif
 452
 453 static const struct udevice_id stm32mp_bsec_ids[] = {
 454         { .compatible = "st,stm32mp15-bsec" },
 455         {}
 456 };
 457
 458 U_BOOT_DRIVER(stm32mp_bsec) = {
 459         .name = "stm32mp_bsec",
 460         .id = UCLASS_MISC,
 461         .of_match = stm32mp_bsec_ids,
 462         .ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
 463         .platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
 464         .ops = &stm32mp_bsec_ops,
 465 #ifndef CONFIG_STM32MP1_TRUSTED
 466         .probe = stm32mp_bsec_probe,
 467 #endif
 468 };