7 select SPL_DM_SEQ_ALIAS
8 select SPL_DRIVERS_MISC_SUPPORT
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
14 select SPL_OF_TRANSLATE
18 select SPL_SERIAL_SUPPORT
21 select SPL_WATCHDOG_SUPPORT if WATCHDOG
22 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
23 imply SPL_BOOTSTAGE if BOOTSTAGE
24 imply SPL_DISPLAY_PRINT
25 imply SPL_LIBDISK_SUPPORT
36 config TARGET_STM32MP1
37 bool "Support stm32mp1xx"
38 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
40 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
41 select CPU_V7_HAS_VIRT
53 imply PRE_CONSOLE_BUFFER
55 imply SYSRESET_PSCI if STM32MP1_TRUSTED
56 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
58 target STMicroelectronics SOC STM32MP1 family
59 STM32MP157, STM32MP153 or STM32MP151
60 STMicroelectronics MPU with core ARMv7
61 dual core A7 for STM32MP157/3, monocore for STM32MP151
63 config STM32MP1_TRUSTED
64 bool "Support trusted boot with TF-A"
68 Say Y here to enable boot with TF-A
69 Trusted boot chain is :
70 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
71 TF-A monitor provides proprietary SMC to manage secure devices
74 bool "Support trusted boot with TF-A and OP-TEE"
75 depends on STM32MP1_TRUSTED
78 Say Y here to enable boot with TF-A and OP-TEE
79 Trusted boot chain is :
80 BootRom => TF-A.stm32 (clock & DDR) => OP-TEE => U-Boot.stm32
81 OP-TEE monitor provides ST SMC to access to secure resources
84 prompt "U-Boot base address"
87 configure the U-Boot base address
88 when DDR driver is used:
89 DDR + 1MB (0xC0100000)
94 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
95 hex "Partition on MMC2 to use to load U-Boot from"
96 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
99 Partition on the second MMC to load U-Boot from when the MMC is being
103 bool "STM32 Extended TrustZone Protection"
104 depends on TARGET_STM32MP1
107 Say y to enable STM32 Extended TrustZone Protection
110 bool "command stm32key to fuse public key hash"
114 fuse public key hash in corresponding fuse used to authenticate
118 config PRE_CON_BUF_ADDR
121 config PRE_CON_BUF_SZ
124 config BOOTSTAGE_STASH_ADDR
128 config SYS_BOOTCOUNT_SINGLEWORD
131 # TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
132 config SYS_BOOTCOUNT_ADDR
138 config DEBUG_UART_BOARD_INIT
141 # debug on UART4 by default
142 config DEBUG_UART_BASE
145 # clock source is HSI on reset
146 config DEBUG_UART_CLOCK
150 source "board/st/stm32mp1/Kconfig"