3 * Vikas Manocha, <vikas.manocha@st.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/rcc.h>
11 #include <asm/arch/stm32.h>
12 #include <asm/arch/stm32_periph.h>
14 void clock_setup(int peripheral)
17 case USART1_CLOCK_CFG:
18 setbits_le32(RCC_BASE + RCC_APB2ENR, RCC_ENR_USART1EN);
20 case GPIO_A_CLOCK_CFG:
21 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_A_EN);
23 case GPIO_B_CLOCK_CFG:
24 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_B_EN);
26 case GPIO_C_CLOCK_CFG:
27 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_C_EN);
29 case GPIO_D_CLOCK_CFG:
30 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_D_EN);
32 case GPIO_E_CLOCK_CFG:
33 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_E_EN);
35 case GPIO_F_CLOCK_CFG:
36 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_F_EN);
38 case GPIO_G_CLOCK_CFG:
39 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_G_EN);
41 case GPIO_H_CLOCK_CFG:
42 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_H_EN);
44 case GPIO_I_CLOCK_CFG:
45 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_I_EN);
47 case GPIO_J_CLOCK_CFG:
48 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_J_EN);
50 case GPIO_K_CLOCK_CFG:
51 setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_K_EN);