1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
6 #include <asm/arch/pinmux.h>
11 static int do_pinctr_pin(const void *blob, int child, const char *node_name)
19 base_addr = fdtdec_get_addr_size(blob, child, "reg", &size);
20 if (base_addr != FDT_ADDR_T_NONE) {
21 cell = fdt_getprop(blob, child, "pinctrl-single,pins", &len);
22 if (!cell || len <= 0)
25 debug("%p %d\n", cell, len);
26 for (; len > 0; len -= (2 * sizeof(u32))) {
27 offset = fdt32_to_cpu(*cell++);
28 value = fdt32_to_cpu(*cell++);
29 debug("<0x%x 0x%x>\n", offset, value);
30 writel(value, base_addr + offset);
37 static int do_pinctrl_pins(const void *blob, int node, const char *child_name)
40 const char *node_name;
42 child = fdt_first_subnode(blob, node);
47 node_name = fdt_get_name(blob, child, &len);
50 if (!strcmp(child_name, node_name))
51 return do_pinctr_pin(blob, child, node_name);
53 child = fdt_next_subnode(blob, child);
58 node_name = fdt_get_name(blob, child, &len);
64 int config_dedicated_pins(const void *blob)
68 node = fdtdec_next_compatible(blob, 0,
69 COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
73 if (do_pinctrl_pins(blob, node, "dedicated_cfg"))
76 if (do_pinctrl_pins(blob, node, "dedicated"))
82 int config_pins(const void *blob, const char *pin_grp)
86 node = fdtdec_next_compatible(blob, 0,
87 COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
91 if (do_pinctrl_pins(blob, node, pin_grp))