1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
6 #ifndef _NIC301_REGISTERS_H_
7 #define _NIC301_REGISTERS_H_
9 struct nic301_registers {
11 /* Security Register Group */
19 u32 lwhps2fpgaregs; /* 0x20 */
20 u32 _pad_0x24_0x28[1];
23 u32 _pad_0x30_0x80[20];
28 u32 hps2fpgaregs; /* 0x90 */
32 u32 sdrdata; /* 0xA0 */
33 u32 _pad_0xa4_0x1fd0[1995];
34 /* ID Register Group */
35 u32 periph_id_4; /* 0x1FD0 */
36 u32 _pad_0x1fd4_0x1fe0[3];
37 u32 periph_id_0; /* 0x1FE0 */
41 u32 comp_id_0; /* 0x1FF0 */
45 u32 _pad_0x2000_0x2008[2];
47 u32 l4main_fn_mod_bm_iss;
48 u32 _pad_0x200c_0x3008[1023];
50 u32 l4sp_fn_mod_bm_iss;
51 u32 _pad_0x300c_0x4008[1023];
53 u32 l4mp_fn_mod_bm_iss;
54 u32 _pad_0x400c_0x5008[1023];
56 u32 l4osc_fn_mod_bm_iss;
57 u32 _pad_0x500c_0x6008[1023];
59 u32 l4spim_fn_mod_bm_iss;
60 u32 _pad_0x600c_0x7008[1023];
62 u32 stm_fn_mod_bm_iss;
63 u32 _pad_0x700c_0x7108[63];
65 u32 _pad_0x710c_0x8008[959];
67 u32 lwhps2fpga_fn_mod_bm_iss;
68 u32 _pad_0x800c_0x8108[63];
69 u32 lwhps2fpga_fn_mod;
70 u32 _pad_0x810c_0xa008[1983];
72 u32 usb1_fn_mod_bm_iss;
73 u32 _pad_0xa00c_0xa044[14];
75 u32 _pad_0xa048_0xb008[1008];
77 u32 nanddata_fn_mod_bm_iss;
78 u32 _pad_0xb00c_0xb108[63];
80 u32 _pad_0xb10c_0x20008[21439];
82 u32 usb0_fn_mod_bm_iss;
83 u32 _pad_0x2000c_0x20044[14];
85 u32 _pad_0x20048_0x21008[1008];
87 u32 nandregs_fn_mod_bm_iss;
88 u32 _pad_0x2100c_0x21108[63];
90 u32 _pad_0x2110c_0x22008[959];
92 u32 qspidata_fn_mod_bm_iss;
93 u32 _pad_0x2200c_0x22044[14];
94 u32 qspidata_ahb_cntl;
95 u32 _pad_0x22048_0x23008[1008];
97 u32 fpgamgrdata_fn_mod_bm_iss;
98 u32 _pad_0x2300c_0x23040[13];
99 u32 fpgamgrdata_wr_tidemark; /* 0x23040 */
100 u32 _pad_0x23044_0x23108[49];
102 u32 _pad_0x2310c_0x24008[959];
104 u32 hps2fpga_fn_mod_bm_iss;
105 u32 _pad_0x2400c_0x24040[13];
106 u32 hps2fpga_wr_tidemark; /* 0x24040 */
107 u32 _pad_0x24044_0x24108[49];
109 u32 _pad_0x2410c_0x25008[959];
111 u32 acp_fn_mod_bm_iss;
112 u32 _pad_0x2500c_0x25108[63];
114 u32 _pad_0x2510c_0x26008[959];
116 u32 bootrom_fn_mod_bm_iss;
117 u32 _pad_0x2600c_0x26108[63];
119 u32 _pad_0x2610c_0x27008[959];
121 u32 ocram_fn_mod_bm_iss;
122 u32 _pad_0x2700c_0x27040[13];
123 u32 ocram_wr_tidemark; /* 0x27040 */
124 u32 _pad_0x27044_0x27108[49];
126 u32 _pad_0x2710c_0x42024[27590];
130 u32 _pad_0x4202c_0x42100[53];
131 u32 dap_read_qos; /* 0x42100 */
134 u32 _pad_0x4210c_0x43100[1021];
136 u32 mpu_read_qos; /* 0x43100 */
139 u32 _pad_0x4310c_0x44028[967];
141 u32 sdmmc_fn_mod_ahb;
142 u32 _pad_0x4402c_0x44100[53];
143 u32 sdmmc_read_qos; /* 0x44100 */
146 u32 _pad_0x4410c_0x45100[1021];
148 u32 dma_read_qos; /* 0x45100 */
151 u32 _pad_0x4510c_0x46040[973];
153 u32 fpga2hps_wr_tidemark; /* 0x46040 */
154 u32 _pad_0x46044_0x46100[47];
155 u32 fpga2hps_read_qos; /* 0x46100 */
156 u32 fpga2hps_write_qos;
158 u32 _pad_0x4610c_0x47100[1021];
160 u32 etr_read_qos; /* 0x47100 */
163 u32 _pad_0x4710c_0x48100[1021];
165 u32 emac0_read_qos; /* 0x48100 */
168 u32 _pad_0x4810c_0x49100[1021];
170 u32 emac1_read_qos; /* 0x49100 */
173 u32 _pad_0x4910c_0x4a028[967];
176 u32 _pad_0x4a02c_0x4a100[53];
177 u32 usb0_read_qos; /* 0x4A100 */
180 u32 _pad_0x4a10c_0x4b100[1021];
182 u32 nand_read_qos; /* 0x4B100 */
185 u32 _pad_0x4b10c_0x4c028[967];
188 u32 _pad_0x4c02c_0x4c100[53];
189 u32 usb1_read_qos; /* 0x4C100 */
194 #endif /* _NIC301_REGISTERS_H_ */