1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000-2003
4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
9 obj-y += clock_manager.o
11 obj-y += reset_manager.o
14 ifdef CONFIG_TARGET_SOCFPGA_GEN5
15 obj-y += clock_manager_gen5.o
17 obj-y += reset_manager_gen5.o
18 obj-y += scan_manager.o
19 obj-y += system_manager_gen5.o
20 obj-y += wrap_pll_config.o
21 obj-y += fpga_manager.o
24 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
25 obj-y += clock_manager_arria10.o
26 obj-y += misc_arria10.o
27 obj-y += pinmux_arria10.o
28 obj-y += reset_manager_arria10.o
31 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
32 obj-y += clock_manager_s10.o
33 obj-y += mailbox_s10.o
35 obj-y += mmu-arm64_s10.o
36 obj-y += reset_manager_s10.o
37 obj-y += system_manager_s10.o
38 obj-y += wrap_pinmux_config_s10.o
39 obj-y += wrap_pll_config_s10.o
41 ifdef CONFIG_SPL_BUILD
43 ifdef CONFIG_TARGET_SOCFPGA_GEN5
44 obj-y += freeze_controller.o
45 obj-y += wrap_iocsr_config.o
46 obj-y += wrap_pinmux_config.o
47 obj-y += wrap_sdram_config.o
51 ifdef CONFIG_TARGET_SOCFPGA_GEN5
52 # QTS-generated config file wrappers
53 CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
54 CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
55 CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
56 CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)