1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000-2003
4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
9 obj-y += clock_manager.o
12 ifdef CONFIG_TARGET_SOCFPGA_GEN5
13 obj-y += clock_manager_gen5.o
15 obj-y += reset_manager_gen5.o
16 obj-y += scan_manager.o
17 obj-y += system_manager_gen5.o
19 obj-y += wrap_pll_config.o
20 obj-y += fpga_manager.o
23 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
24 obj-y += clock_manager_arria10.o
25 obj-y += misc_arria10.o
26 obj-y += pinmux_arria10.o
27 obj-y += reset_manager_arria10.o
30 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
31 obj-y += clock_manager_s10.o
32 obj-y += mailbox_s10.o
34 obj-y += mmu-arm64_s10.o
35 obj-y += reset_manager_s10.o
36 obj-y += system_manager_s10.o
38 obj-y += wrap_pinmux_config_s10.o
39 obj-y += wrap_pll_config_s10.o
42 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
43 obj-y += clock_manager_agilex.o
44 obj-y += mailbox_s10.o
46 obj-y += mmu-arm64_s10.o
47 obj-y += reset_manager_s10.o
48 obj-y += system_manager_s10.o
50 obj-y += wrap_pinmux_config_s10.o
51 obj-y += wrap_pll_config_s10.o
54 ifdef CONFIG_SPL_BUILD
55 ifdef CONFIG_TARGET_SOCFPGA_GEN5
57 obj-y += freeze_controller.o
58 obj-y += wrap_iocsr_config.o
59 obj-y += wrap_pinmux_config.o
60 obj-y += wrap_sdram_config.o
62 ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
65 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
69 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
75 ifdef CONFIG_TARGET_SOCFPGA_GEN5
76 # QTS-generated config file wrappers
77 CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
78 CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
79 CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
80 CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)