3 config SPL_LIBCOMMON_SUPPORT
6 config SPL_LIBDISK_SUPPORT
9 config SPL_LIBGENERIC_SUPPORT
12 config SPL_MMC_SUPPORT
15 config SPL_NAND_SUPPORT
16 default y if SPL_NAND_DENALI
18 config SPL_SERIAL_SUPPORT
21 config SPL_SPI_FLASH_SUPPORT
22 default y if SPL_SPI_SUPPORT
24 config SPL_SPI_SUPPORT
27 config SPL_WATCHDOG_SUPPORT
30 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
33 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
36 config TARGET_SOCFPGA_ARRIA5
38 select TARGET_SOCFPGA_GEN5
40 config TARGET_SOCFPGA_CYCLONE5
42 select TARGET_SOCFPGA_GEN5
44 config TARGET_SOCFPGA_GEN5
49 prompt "Altera SOCFPGA board select"
52 config TARGET_SOCFPGA_ARRIA5_SOCDK
53 bool "Altera SOCFPGA SoCDK (Arria V)"
54 select TARGET_SOCFPGA_ARRIA5
56 config TARGET_SOCFPGA_CYCLONE5_SOCDK
57 bool "Altera SOCFPGA SoCDK (Cyclone V)"
58 select TARGET_SOCFPGA_CYCLONE5
60 config TARGET_SOCFPGA_ARIES_MCVEVK
61 bool "Aries MCVEVK (Cyclone V)"
62 select TARGET_SOCFPGA_CYCLONE5
64 config TARGET_SOCFPGA_EBV_SOCRATES
65 bool "EBV SoCrates (Cyclone V)"
66 select TARGET_SOCFPGA_CYCLONE5
68 config TARGET_SOCFPGA_IS1
69 bool "IS1 (Cyclone V)"
70 select TARGET_SOCFPGA_CYCLONE5
72 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
73 bool "samtec VIN|ING FPGA (Cyclone V)"
74 select BOARD_LATE_INIT
75 select TARGET_SOCFPGA_CYCLONE5
77 config TARGET_SOCFPGA_SR1500
78 bool "SR1500 (Cyclone V)"
79 select TARGET_SOCFPGA_CYCLONE5
81 config TARGET_SOCFPGA_TERASIC_DE0_NANO
82 bool "Terasic DE0-Nano-Atlas (Cyclone V)"
83 select TARGET_SOCFPGA_CYCLONE5
85 config TARGET_SOCFPGA_TERASIC_DE10_NANO
86 bool "Terasic DE10-Nano (Cyclone V)"
87 select TARGET_SOCFPGA_CYCLONE5
89 config TARGET_SOCFPGA_TERASIC_DE1_SOC
90 bool "Terasic DE1-SoC (Cyclone V)"
91 select TARGET_SOCFPGA_CYCLONE5
93 config TARGET_SOCFPGA_TERASIC_SOCKIT
94 bool "Terasic SoCkit (Cyclone V)"
95 select TARGET_SOCFPGA_CYCLONE5
100 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
101 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
102 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
103 default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
104 default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
105 default "is1" if TARGET_SOCFPGA_IS1
106 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
107 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
108 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
109 default "sr1500" if TARGET_SOCFPGA_SR1500
110 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
113 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
114 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
115 default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
116 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
117 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
118 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
119 default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
120 default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO
121 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
126 config SYS_CONFIG_NAME
127 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
128 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
129 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
130 default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
131 default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
132 default "socfpga_is1" if TARGET_SOCFPGA_IS1
133 default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
134 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
135 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
136 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
137 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA