3 config SPL_LIBCOMMON_SUPPORT
6 config SPL_LIBDISK_SUPPORT
9 config SPL_LIBGENERIC_SUPPORT
12 config SPL_MMC_SUPPORT
15 config SPL_NAND_SUPPORT
16 default y if SPL_NAND_DENALI
18 config SPL_SERIAL_SUPPORT
21 config SPL_SPI_FLASH_SUPPORT
22 default y if SPL_SPI_SUPPORT
24 config SPL_SPI_SUPPORT
27 config SPL_WATCHDOG_SUPPORT
30 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
33 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
36 config TARGET_SOCFPGA_ARRIA5
38 select TARGET_SOCFPGA_GEN5
40 config TARGET_SOCFPGA_CYCLONE5
42 select TARGET_SOCFPGA_GEN5
44 config TARGET_SOCFPGA_GEN5
48 prompt "Altera SOCFPGA board select"
51 config TARGET_SOCFPGA_ARRIA5_SOCDK
52 bool "Altera SOCFPGA SoCDK (Arria V)"
53 select TARGET_SOCFPGA_ARRIA5
55 config TARGET_SOCFPGA_CYCLONE5_SOCDK
56 bool "Altera SOCFPGA SoCDK (Cyclone V)"
57 select TARGET_SOCFPGA_CYCLONE5
59 config TARGET_SOCFPGA_DENX_MCVEVK
60 bool "DENX MCVEVK (Cyclone V)"
61 select TARGET_SOCFPGA_CYCLONE5
63 config TARGET_SOCFPGA_EBV_SOCRATES
64 bool "EBV SoCrates (Cyclone V)"
65 select TARGET_SOCFPGA_CYCLONE5
67 config TARGET_SOCFPGA_IS1
68 bool "IS1 (Cyclone V)"
69 select TARGET_SOCFPGA_CYCLONE5
71 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
72 bool "samtec VIN|ING FPGA (Cyclone V)"
73 select BOARD_LATE_INIT
74 select TARGET_SOCFPGA_CYCLONE5
76 config TARGET_SOCFPGA_SR1500
77 bool "SR1500 (Cyclone V)"
78 select TARGET_SOCFPGA_CYCLONE5
80 config TARGET_SOCFPGA_TERASIC_DE0_NANO
81 bool "Terasic DE0-Nano-Atlas (Cyclone V)"
82 select TARGET_SOCFPGA_CYCLONE5
84 config TARGET_SOCFPGA_TERASIC_DE1_SOC
85 bool "Terasic DE1-SoC (Cyclone V)"
86 select TARGET_SOCFPGA_CYCLONE5
88 config TARGET_SOCFPGA_TERASIC_SOCKIT
89 bool "Terasic SoCkit (Cyclone V)"
90 select TARGET_SOCFPGA_CYCLONE5
95 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
96 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
97 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
98 default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
99 default "is1" if TARGET_SOCFPGA_IS1
100 default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
101 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
102 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
103 default "sr1500" if TARGET_SOCFPGA_SR1500
104 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
107 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
108 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
109 default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
110 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
111 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
112 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
113 default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
114 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
119 config SYS_CONFIG_NAME
120 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
121 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
122 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
123 default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
124 default "socfpga_is1" if TARGET_SOCFPGA_IS1
125 default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
126 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
127 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
128 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
129 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA