1 // SPDX-License-Identifier: GPL-2.0+
3 * TLMM driver for Qualcomm APQ8016, APQ8096
5 * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
13 #include <dm/pinctrl.h>
14 #include "pinctrl-snapdragon.h"
16 struct msm_pinctrl_priv {
18 struct msm_pinctrl_data *data;
21 #define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000)
22 #define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
23 #define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
24 #define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
25 #define TLMM_GPIO_DISABLE BIT(9)
27 static const struct pinconf_param msm_conf_params[] = {
28 { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 },
29 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
32 static int msm_get_functions_count(struct udevice *dev)
34 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
36 return priv->data->functions_count;
39 static int msm_get_pins_count(struct udevice *dev)
41 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
43 return priv->data->pin_count;
46 static const char *msm_get_function_name(struct udevice *dev,
47 unsigned int selector)
49 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
51 return priv->data->get_function_name(dev, selector);
54 static int msm_pinctrl_probe(struct udevice *dev)
56 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
58 priv->base = devfdt_get_addr(dev);
59 priv->data = (struct msm_pinctrl_data *)dev->driver_data;
61 return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
64 static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector)
66 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
68 return priv->data->get_pin_name(dev, selector);
71 static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
72 unsigned int func_selector)
74 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
76 clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
77 TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
78 priv->data->get_function_mux(func_selector) << 2);
82 static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
83 unsigned int param, unsigned int argument)
85 struct msm_pinctrl_priv *priv = dev_get_priv(dev);
88 case PIN_CONFIG_DRIVE_STRENGTH:
89 clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
90 TLMM_DRV_STRENGTH_MASK, argument << 6);
92 case PIN_CONFIG_BIAS_DISABLE:
93 clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
103 static struct pinctrl_ops msm_pinctrl_ops = {
104 .get_pins_count = msm_get_pins_count,
105 .get_pin_name = msm_get_pin_name,
106 .set_state = pinctrl_generic_set_state,
107 .pinmux_set = msm_pinmux_set,
108 .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
109 .pinconf_params = msm_conf_params,
110 .pinconf_set = msm_pinconf_set,
111 .get_functions_count = msm_get_functions_count,
112 .get_function_name = msm_get_function_name,
115 static const struct udevice_id msm_pinctrl_ids[] = {
116 { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data },
117 { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data },
121 U_BOOT_DRIVER(pinctrl_snapdraon) = {
122 .name = "pinctrl_msm",
123 .id = UCLASS_PINCTRL,
124 .of_match = msm_pinctrl_ids,
125 .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv),
126 .ops = &msm_pinctrl_ops,
127 .probe = msm_pinctrl_probe,