ARM: omap3_logic boards: Convert to DM_ETH
[oweals/u-boot.git] / arch / arm / mach-rockchip / tpl.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4  */
5
6 #include <common.h>
7 #include <debug_uart.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <ram.h>
11 #include <spl.h>
12 #include <version.h>
13 #include <asm/io.h>
14 #include <asm/arch-rockchip/bootrom.h>
15
16 #define TIMER_LOAD_COUNT_L      0x00
17 #define TIMER_LOAD_COUNT_H      0x04
18 #define TIMER_CONTROL_REG       0x10
19 #define TIMER_EN        0x1
20 #define TIMER_FMODE     BIT(0)
21 #define TIMER_RMODE     BIT(1)
22
23 __weak void rockchip_stimer_init(void)
24 {
25         /* If Timer already enabled, don't re-init it */
26         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
27
28         if (reg & TIMER_EN)
29                 return;
30
31 #ifndef CONFIG_ARM64
32         asm volatile("mcr p15, 0, %0, c14, c0, 0"
33                      : : "r"(COUNTER_FREQUENCY));
34 #endif
35
36         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
37         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
38         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
39         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
40                TIMER_CONTROL_REG);
41 }
42
43 __weak int board_early_init_f(void)
44 {
45         return 0;
46 }
47
48 void board_init_f(ulong dummy)
49 {
50         struct udevice *dev;
51         int ret;
52
53         board_early_init_f();
54
55 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
56         /*
57          * Debug UART can be used from here if required:
58          *
59          * debug_uart_init();
60          * printch('a');
61          * printhex8(0x1234);
62          * printascii("string");
63          */
64         debug_uart_init();
65 #ifdef CONFIG_TPL_BANNER_PRINT
66         printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
67                                 U_BOOT_TIME ")\n");
68 #endif
69 #endif
70         ret = spl_early_init();
71         if (ret) {
72                 debug("spl_early_init() failed: %d\n", ret);
73                 hang();
74         }
75
76         /* Init secure timer */
77         rockchip_stimer_init();
78         /* Init ARM arch timer in arch/arm/cpu/ */
79         timer_init();
80
81         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
82         if (ret) {
83                 printf("DRAM init failed: %d\n", ret);
84                 return;
85         }
86 }
87
88 int board_return_to_bootrom(struct spl_image_info *spl_image,
89                             struct spl_boot_device *bootdev)
90 {
91         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
92
93         return 0;
94 }
95
96 u32 spl_boot_device(void)
97 {
98         return BOOT_DEVICE_BOOTROM;
99 }