1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
8 #include <debug_uart.h>
15 #include <asm/arch-rockchip/bootrom.h>
16 #include <asm/arch-rockchip/clock.h>
17 #include <asm/arch-rockchip/grf_rk3399.h>
18 #include <asm/arch-rockchip/hardware.h>
19 #include <asm/arch-rockchip/periph.h>
20 #include <asm/arch-rockchip/sys_proto.h>
21 #include <dm/pinctrl.h>
23 void board_return_to_bootrom(void)
25 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
28 static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
29 [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
30 [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
31 [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
34 const char *board_spl_was_booted_from(void)
36 u32 bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
37 const char *bootdevice_ofpath = NULL;
39 if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
40 bootdevice_ofpath = boot_devices[bootdevice_brom_id];
42 if (bootdevice_ofpath)
43 debug("%s: brom_bootdevice_id %x maps to '%s'\n",
44 __func__, bootdevice_brom_id, bootdevice_ofpath);
46 debug("%s: failed to resolve brom_bootdevice_id %x\n",
47 __func__, bootdevice_brom_id);
49 return bootdevice_ofpath;
52 u32 spl_boot_device(void)
54 u32 boot_device = BOOT_DEVICE_MMC1;
56 if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
57 return BOOT_DEVICE_BOOTROM;
62 const char *spl_decode_boot_device(u32 boot_device)
68 } spl_boot_devices_tbl[] = {
69 { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
70 { BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
71 { BOOT_DEVICE_SPI, "/spi@ff1d0000" },
74 for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
75 if (spl_boot_devices_tbl[i].boot_device == boot_device)
76 return spl_boot_devices_tbl[i].ofpath;
81 void spl_perform_fixups(struct spl_image_info *spl_image)
83 void *blob = spl_image->fdt_addr;
84 const char *boot_ofpath;
88 * Inject the ofpath of the device the full U-Boot (or Linux in
89 * Falcon-mode) was booted from into the FDT, if a FDT has been
90 * loaded at the same time.
95 boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
97 pr_err("%s: could not map boot_device to ofpath\n", __func__);
101 chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
103 pr_err("%s: could not find/create '/chosen'\n", __func__);
106 fdt_setprop_string(blob, chosen,
107 "u-boot,spl-boot-device", boot_ofpath);
110 #define TIMER_CHN10_BASE 0xff8680a0
111 #define TIMER_END_COUNT_L 0x00
112 #define TIMER_END_COUNT_H 0x04
113 #define TIMER_INIT_COUNT_L 0x10
114 #define TIMER_INIT_COUNT_H 0x14
115 #define TIMER_CONTROL_REG 0x1c
118 #define TIMER_FMODE (0 << 1)
119 #define TIMER_RMODE (1 << 1)
121 void secure_timer_init(void)
123 writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
124 writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
125 writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
126 writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
127 writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
131 void board_init_f(ulong dummy)
133 struct udevice *pinctrl;
135 struct rk3399_pmusgrf_regs *sgrf;
136 struct rk3399_grf_regs *grf;
139 #ifdef CONFIG_DEBUG_UART
142 # ifdef CONFIG_TARGET_CHROMEBOOK_BOB
146 * Add a delay and ensure that the compiler does not optimise this out.
147 * This is needed since the power rails tail a while to turn on, and
148 * we get garbage serial output otherwise.
151 for (i = 0; i < 150000; i++)
153 gru_dummy_function(sum);
154 #endif /* CONFIG_TARGET_CHROMEBOOK_BOB */
157 * Debug UART can be used from here if required:
162 * printascii("string");
164 printascii("U-Boot SPL board init\n");
167 ret = spl_early_init();
169 debug("spl_early_init() failed: %d\n", ret);
174 * Disable DDR and SRAM security regions.
176 * As we are entered from the BootROM, the region from
177 * 0x0 through 0xfffff (i.e. the first MB of memory) will
178 * be protected. This will cause issues with the DW_MMC
179 * driver, which tries to DMA from/to the stack (likely)
180 * located in this range.
182 sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
183 rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
184 rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
186 /* eMMC clock generator: disable the clock multipilier */
187 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
188 rk_clrreg(&grf->emmccore_con[11], 0x0ff);
192 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
194 pr_err("Pinctrl init failed: %d\n", ret);
198 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
200 pr_err("DRAM init failed: %d\n", ret);
205 #ifdef CONFIG_SPL_LOAD_FIT
206 int board_fit_config_name_match(const char *name)
208 /* Just empty function now - can't decide what to choose */
209 debug("%s: %s\n", __func__, name);