arch/arm/mach-rockchip/rk3328/rk3328.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2016 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <asm/arch/hardware.h>
   8 #include <asm/armv8/mmu.h>
   9 #include <asm/io.h>
  10
  11 DECLARE_GLOBAL_DATA_PTR;
  12
  13 static struct mm_region rk3328_mem_map[] = {
  14         {
  15                 .virt = 0x0UL,
  16                 .phys = 0x0UL,
  17                 .size = 0xff000000UL,
  18                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  19                          PTE_BLOCK_INNER_SHARE
  20         }, {
  21                 .virt = 0xff000000UL,
  22                 .phys = 0xff000000UL,
  23                 .size = 0x1000000UL,
  24                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  25                          PTE_BLOCK_NON_SHARE |
  26                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  27         }, {
  28                 /* List terminator */
  29                 0,
  30         }
  31 };
  32
  33 struct mm_region *mem_map = rk3328_mem_map;
  34
  35 int dram_init_banksize(void)
  36 {
  37         size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
  38
  39         /* Reserve 0x200000 for ATF bl31 */
  40         gd->bd->bi_dram[0].start = 0x200000;
  41         gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
  42
  43         return 0;
  44 }
  45
  46 int arch_cpu_init(void)
  47 {
  48         /* We do some SoC one time setting here. */
  49
  50         return 0;
  51 }