2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/clock.h>
13 #include <asm/arch/periph.h>
14 #include <asm/arch/grf_rk322x.h>
15 #include <asm/arch/boot_mode.h>
17 DECLARE_GLOBAL_DATA_PTR;
19 __weak int rk_board_late_init(void)
24 int board_late_init(void)
28 return rk_board_late_init();
33 #include <asm/arch/grf_rk322x.h>
34 /* Enable early UART2 channel 1 on the RK322x */
35 #define GRF_BASE 0x11000000
36 struct rk322x_grf * const grf = (void *)GRF_BASE;
39 GPIO1B2_MASK = 3 << GPIO1B2_SHIFT,
44 GPIO1B1_MASK = 3 << GPIO1B1_SHIFT,
50 CON_IOMUX_UART2SEL_SHIFT= 8,
51 CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
52 CON_IOMUX_UART2SEL_2 = 0,
53 CON_IOMUX_UART2SEL_21,
56 rk_clrsetreg(&grf->gpio1b_iomux,
57 GPIO1B1_MASK | GPIO1B2_MASK,
58 GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
59 GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
60 /* Set channel C as UART2 input */
61 rk_clrsetreg(&grf->con_iomux,
62 CON_IOMUX_UART2SEL_MASK,
63 CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
66 * The integrated macphy is enabled by default, disable it
67 * for saving power consuming.
69 rk_clrsetreg(&grf->macphy_con[0],
70 MACPHY_CFG_ENABLE_MASK,
71 0 << MACPHY_CFG_ENABLE_SHIFT);
76 int dram_init_banksize(void)
78 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
79 gd->bd->bi_dram[0].size = 0x8400000;
80 /* Reserve 0x200000 for OPTEE */
81 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
82 + gd->bd->bi_dram[0].size + 0x200000;
83 gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
84 + gd->ram_size - gd->bd->bi_dram[1].start;
89 #ifndef CONFIG_SYS_DCACHE_OFF
90 void enable_caches(void)
92 /* Enable D-cache. I-cache is already enabled in start.S */
97 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
99 #include <usb/dwc2_udc.h>
101 static struct dwc2_plat_otg_data rk322x_otg_data = {
107 int board_usb_init(int index, enum usb_init_type init)
111 bool matched = false;
112 const void *blob = gd->fdt_blob;
114 /* find the usb_otg node */
115 node = fdt_node_offset_by_compatible(blob, -1,
116 "rockchip,rk3288-usb");
119 mode = fdt_getprop(blob, node, "dr_mode", NULL);
120 if (mode && strcmp(mode, "otg") == 0) {
125 node = fdt_node_offset_by_compatible(blob, node,
126 "rockchip,rk3288-usb");
129 debug("Not found usb_otg device\n");
132 rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
134 return dwc2_udc_probe(&rk322x_otg_data);
137 int board_usb_cleanup(int index, enum usb_init_type init)
143 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
144 int fb_set_reboot_flag(void)
146 struct rk322x_grf *grf;
148 printf("Setting reboot to fastboot flag ...\n");
149 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
150 /* Set boot mode to fastboot */
151 writel(BOOT_FASTBOOT, &grf->os_reg[0]);