2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <debug_uart.h>
13 #include <asm/arch/bootrom.h>
14 #include <asm/arch/cru_rk322x.h>
15 #include <asm/arch/grf_rk322x.h>
16 #include <asm/arch/hardware.h>
17 #include <asm/arch/timer.h>
18 #include <asm/arch/uart.h>
20 u32 spl_boot_device(void)
22 return BOOT_DEVICE_MMC1;
24 DECLARE_GLOBAL_DATA_PTR;
26 #define GRF_BASE 0x11000000
27 #define SGRF_BASE 0x10140000
29 #define DEBUG_UART_BASE 0x11030000
31 void board_debug_uart_init(void)
33 static struct rk322x_grf * const grf = (void *)GRF_BASE;
36 GPIO1B2_MASK = 3 << GPIO1B2_SHIFT,
42 GPIO1B1_MASK = 3 << GPIO1B1_SHIFT,
48 CON_IOMUX_UART2SEL_SHIFT= 8,
49 CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
50 CON_IOMUX_UART2SEL_2 = 0,
51 CON_IOMUX_UART2SEL_21,
54 /* Enable early UART2 channel 1 on the RK322x */
55 rk_clrsetreg(&grf->gpio1b_iomux,
56 GPIO1B1_MASK | GPIO1B2_MASK,
57 GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
58 GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
59 /* Set channel C as UART2 input */
60 rk_clrsetreg(&grf->con_iomux,
61 CON_IOMUX_UART2SEL_MASK,
62 CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
65 #define SGRF_DDR_CON0 0x10150000
66 void board_init_f(ulong dummy)
72 * Debug UART can be used from here if required:
77 * printascii("string");
80 printascii("SPL Init");
82 ret = spl_early_init();
84 debug("spl_early_init() failed: %d\n", ret);
88 rockchip_timer_init();
89 printf("timer init done\n");
90 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
92 printf("DRAM init failed: %d\n", ret);
96 /* Disable the ddr secure region setting to make it non-secure */
97 rk_clrreg(SGRF_DDR_CON0, 0x4000);
98 #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
99 back_to_bootrom(BROM_BOOT_NEXTSTAGE);