4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
36 select SPL_DRIVERS_MISC_SUPPORT
37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
38 select BOARD_LATE_INIT
39 select ROCKCHIP_BROM_HELPER
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
47 config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60 config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
63 select SPL_BOARD_INIT if SPL
66 imply USB_FUNCTION_ROCKUSB
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
73 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
75 config ROCKCHIP_RK3328
76 bool "Support Rockchip RK3328"
79 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
80 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
81 video interfaces supporting HDMI and eDP, several DDR3 options
82 and video codec support. Peripherals include Gigabit Ethernet,
83 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
85 config ROCKCHIP_RK3368
86 bool "Support Rockchip RK3368"
90 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
91 select TPL_NEEDS_SEPARATE_STACK if TPL
92 imply SPL_SEPARATE_BSS
93 imply SPL_SERIAL_SUPPORT
94 imply TPL_SERIAL_SUPPORT
95 select DEBUG_UART_BOARD_INIT
98 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
99 into a big and little cluster with 4 cores each) Cortex-A53 including
100 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
101 (for the little cluster), PowerVR G6110 based graphics, one video
102 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
105 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
106 I2S, UARTs, SPI, I2C and PWMs.
111 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
124 config ROCKCHIP_RK3399
125 bool "Support Rockchip RK3399"
129 select SPL_SEPARATE_BSS
130 select SPL_SERIAL_SUPPORT
131 select SPL_DRIVERS_MISC_SUPPORT
132 select DEBUG_UART_BOARD_INIT
133 select BOARD_LATE_INIT
134 select ROCKCHIP_BROM_HELPER
136 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
137 and quad-core Cortex-A53.
138 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
139 video interfaces supporting HDMI and eDP, several DDR3 options
140 and video codec support. Peripherals include Gigabit Ethernet,
141 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
143 config ROCKCHIP_RV1108
144 bool "Support Rockchip RV1108"
147 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
150 config SPL_ROCKCHIP_BACK_TO_BROM
151 bool "SPL returns to bootrom"
152 default y if ROCKCHIP_RK3036
153 select ROCKCHIP_BROM_HELPER
156 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
157 SPL will return to the boot rom, which will then load the U-Boot
158 binary to keep going on.
160 config TPL_ROCKCHIP_BACK_TO_BROM
161 bool "TPL returns to bootrom"
162 default y if ROCKCHIP_RK3368
163 select ROCKCHIP_BROM_HELPER
166 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
167 SPL will return to the boot rom, which will then load the U-Boot
168 binary to keep going on.
170 config ROCKCHIP_BOOT_MODE_REG
171 hex "Rockchip boot mode flag register address"
172 default 0x200081c8 if ROCKCHIP_RK3036
173 default 0x20004040 if ROCKCHIP_RK3188
174 default 0x110005c8 if ROCKCHIP_RK322X
175 default 0xff730094 if ROCKCHIP_RK3288
176 default 0xff738200 if ROCKCHIP_RK3368
177 default 0xff320300 if ROCKCHIP_RK3399
178 default 0x10300580 if ROCKCHIP_RV1108
181 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
182 according to the value from this register.
184 config ROCKCHIP_SPL_RESERVE_IRAM
185 hex "Size of IRAM reserved in SPL"
188 SPL may need reserve memory for firmware loaded by SPL, whose load
189 address is in IRAM and may overlay with SPL text area if not
192 config ROCKCHIP_BROM_HELPER
195 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
196 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
197 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
199 Some Rockchip BROM variants (e.g. on the RK3188) load the
200 first stage in segments and enter multiple times. E.g. on
201 the RK3188, the first 1KB of the first stage are loaded
202 first and entered; after returning to the BROM, the
203 remainder of the first stage is loaded, but the BROM
204 re-enters at the same address/to the same code as previously.
206 This enables support code in the BOOT0 hook for the SPL stage
207 to allow multiple entries.
209 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
210 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
211 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
213 Some Rockchip BROM variants (e.g. on the RK3188) load the
214 first stage in segments and enter multiple times. E.g. on
215 the RK3188, the first 1KB of the first stage are loaded
216 first and entered; after returning to the BROM, the
217 remainder of the first stage is loaded, but the BROM
218 re-enters at the same address/to the same code as previously.
220 This enables support code in the BOOT0 hook for the TPL stage
221 to allow multiple entries.
223 config SPL_MMC_SUPPORT
224 default y if !SPL_ROCKCHIP_BACK_TO_BROM
226 source "arch/arm/mach-rockchip/rk3036/Kconfig"
227 source "arch/arm/mach-rockchip/rk3128/Kconfig"
228 source "arch/arm/mach-rockchip/rk3188/Kconfig"
229 source "arch/arm/mach-rockchip/rk322x/Kconfig"
230 source "arch/arm/mach-rockchip/rk3288/Kconfig"
231 source "arch/arm/mach-rockchip/rk3328/Kconfig"
232 source "arch/arm/mach-rockchip/rk3368/Kconfig"
233 source "arch/arm/mach-rockchip/rk3399/Kconfig"
234 source "arch/arm/mach-rockchip/rv1108/Kconfig"