4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
35 select SPL_DRIVERS_MISC_SUPPORT
36 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
37 select BOARD_LATE_INIT
38 select ROCKCHIP_BROM_HELPER
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
46 config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
62 imply TPL_BOOTROM_SUPPORT
63 imply TPL_ROCKCHIP_COMMON_BOARD
64 select ROCKCHIP_BROM_HELPER
65 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
73 config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
76 select SPL_BOARD_INIT if SPL
80 imply TPL_BOOTROM_SUPPORT
83 imply TPL_DRIVERS_MISC_SUPPORT
84 imply TPL_LIBCOMMON_SUPPORT
85 imply TPL_LIBGENERIC_SUPPORT
86 imply TPL_NEEDS_SEPARATE_TEXT_BASE
87 imply TPL_NEEDS_SEPARATE_STACK
92 imply TPL_ROCKCHIP_COMMON_BOARD
93 imply TPL_SERIAL_SUPPORT
95 imply USB_FUNCTION_ROCKUSB
98 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
99 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
100 video interfaces supporting HDMI and eDP, several DDR3 options
101 and video codec support. Peripherals include Gigabit Ethernet,
102 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
104 config ROCKCHIP_RK3328
105 bool "Support Rockchip RK3328"
109 imply SPL_SERIAL_SUPPORT
110 imply SPL_SEPARATE_BSS
111 select ENABLE_ARM_SOC_BOOT0_HOOK
112 select DEBUG_UART_BOARD_INIT
115 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
116 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
117 video interfaces supporting HDMI and eDP, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
121 config ROCKCHIP_RK3368
122 bool "Support Rockchip RK3368"
126 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
127 select TPL_NEEDS_SEPARATE_STACK if TPL
128 imply SPL_SEPARATE_BSS
129 imply SPL_SERIAL_SUPPORT
130 imply TPL_SERIAL_SUPPORT
131 imply TPL_ROCKCHIP_COMMON_BOARD
133 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
134 into a big and little cluster with 4 cores each) Cortex-A53 including
135 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
136 (for the little cluster), PowerVR G6110 based graphics, one video
137 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
140 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
141 I2S, UARTs, SPI, I2C and PWMs.
143 config ROCKCHIP_RK3399
144 bool "Support Rockchip RK3399"
150 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
151 select SPL_BOARD_INIT if SPL
153 select SPL_CLK if SPL
154 select SPL_PINCTRL if SPL
155 select SPL_RAM if SPL
156 select SPL_REGMAP if SPL
157 select SPL_SYSCON if SPL
158 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
159 select TPL_NEEDS_SEPARATE_STACK if TPL
160 select SPL_SEPARATE_BSS
161 select SPL_SERIAL_SUPPORT
162 select SPL_DRIVERS_MISC_SUPPORT
170 select DM_REGULATOR_FIXED
171 select BOARD_LATE_INIT
172 select ROCKCHIP_BROM_HELPER
173 imply TPL_SERIAL_SUPPORT
174 imply TPL_LIBCOMMON_SUPPORT
175 imply TPL_LIBGENERIC_SUPPORT
176 imply TPL_SYS_MALLOC_SIMPLE
177 imply TPL_BOOTROM_SUPPORT
178 imply TPL_DRIVERS_MISC_SUPPORT
185 imply TPL_TINY_MEMSET
186 imply TPL_ROCKCHIP_COMMON_BOARD
188 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
189 and quad-core Cortex-A53.
190 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
191 video interfaces supporting HDMI and eDP, several DDR3 options
192 and video codec support. Peripherals include Gigabit Ethernet,
193 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
195 config ROCKCHIP_RV1108
196 bool "Support Rockchip RV1108"
199 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
202 config ROCKCHIP_USB_UART
203 bool "Route uart output to usb pins"
205 Rockchip SoCs have the ability to route the signals of the debug
206 uart through the d+ and d- pins of a specific usb phy to enable
207 some form of closed-case debugging. With this option supported
208 SoCs will enable this routing as a debug measure.
210 config SPL_ROCKCHIP_BACK_TO_BROM
211 bool "SPL returns to bootrom"
212 default y if ROCKCHIP_RK3036
213 select ROCKCHIP_BROM_HELPER
216 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
217 SPL will return to the boot rom, which will then load the U-Boot
218 binary to keep going on.
220 config TPL_ROCKCHIP_BACK_TO_BROM
221 bool "TPL returns to bootrom"
223 select ROCKCHIP_BROM_HELPER
226 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
227 SPL will return to the boot rom, which will then load the U-Boot
228 binary to keep going on.
230 config SPL_ROCKCHIP_COMMON_BOARD
231 bool "Rockchip SPL common board file"
234 Rockchip SoCs have similar boot process, SPL is mainly in charge of
235 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
236 no TPL for the board.
238 config TPL_ROCKCHIP_COMMON_BOARD
242 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
243 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
244 common board is a basic TPL board init which can be shared for most
245 of SoCs to avoid copy-pase for different SoCs.
247 config ROCKCHIP_BOOT_MODE_REG
248 hex "Rockchip boot mode flag register address"
250 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
251 according to the value from this register.
253 config ROCKCHIP_SPL_RESERVE_IRAM
254 hex "Size of IRAM reserved in SPL"
257 SPL may need reserve memory for firmware loaded by SPL, whose load
258 address is in IRAM and may overlay with SPL text area if not
261 config ROCKCHIP_BROM_HELPER
264 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
265 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
266 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
268 Some Rockchip BROM variants (e.g. on the RK3188) load the
269 first stage in segments and enter multiple times. E.g. on
270 the RK3188, the first 1KB of the first stage are loaded
271 first and entered; after returning to the BROM, the
272 remainder of the first stage is loaded, but the BROM
273 re-enters at the same address/to the same code as previously.
275 This enables support code in the BOOT0 hook for the SPL stage
276 to allow multiple entries.
278 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
279 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
280 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
282 Some Rockchip BROM variants (e.g. on the RK3188) load the
283 first stage in segments and enter multiple times. E.g. on
284 the RK3188, the first 1KB of the first stage are loaded
285 first and entered; after returning to the BROM, the
286 remainder of the first stage is loaded, but the BROM
287 re-enters at the same address/to the same code as previously.
289 This enables support code in the BOOT0 hook for the TPL stage
290 to allow multiple entries.
292 config SPL_MMC_SUPPORT
293 default y if !SPL_ROCKCHIP_BACK_TO_BROM
295 source "arch/arm/mach-rockchip/rk3036/Kconfig"
296 source "arch/arm/mach-rockchip/rk3128/Kconfig"
297 source "arch/arm/mach-rockchip/rk3188/Kconfig"
298 source "arch/arm/mach-rockchip/rk322x/Kconfig"
299 source "arch/arm/mach-rockchip/rk3288/Kconfig"
300 source "arch/arm/mach-rockchip/rk3328/Kconfig"
301 source "arch/arm/mach-rockchip/rk3368/Kconfig"
302 source "arch/arm/mach-rockchip/rk3399/Kconfig"
303 source "arch/arm/mach-rockchip/rv1108/Kconfig"