4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16 config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
25 config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
28 select SPL_BOARD_INIT if SPL
36 select SPL_DRIVERS_MISC_SUPPORT
37 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
38 select BOARD_LATE_INIT
39 select ROCKCHIP_BROM_HELPER
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
47 config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
52 select ROCKCHIP_BROM_HELPER
53 select DEBUG_UART_BOARD_INIT
55 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
56 including NEON and GPU, Mali-400 graphics, several DDR3 options
57 and video codec support. Peripherals include Gigabit Ethernet,
58 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
60 config ROCKCHIP_RK3288
61 bool "Support Rockchip RK3288"
63 select SPL_BOARD_INIT if SPL
66 imply USB_FUNCTION_ROCKUSB
69 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
70 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
71 video interfaces supporting HDMI and eDP, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
73 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
78 default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds"
85 config ROCKCHIP_RK3328
86 bool "Support Rockchip RK3328"
89 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
90 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
91 video interfaces supporting HDMI and eDP, several DDR3 options
92 and video codec support. Peripherals include Gigabit Ethernet,
93 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
95 config ROCKCHIP_RK3368
96 bool "Support Rockchip RK3368"
100 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
101 select TPL_NEEDS_SEPARATE_STACK if TPL
102 imply SPL_SEPARATE_BSS
103 imply SPL_SERIAL_SUPPORT
104 imply TPL_SERIAL_SUPPORT
105 select DEBUG_UART_BOARD_INIT
108 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
109 into a big and little cluster with 4 cores each) Cortex-A53 including
110 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
111 (for the little cluster), PowerVR G6110 based graphics, one video
112 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
115 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
116 I2S, UARTs, SPI, I2C and PWMs.
121 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
134 config ROCKCHIP_RK3399
135 bool "Support Rockchip RK3399"
139 select SPL_SEPARATE_BSS
140 select SPL_SERIAL_SUPPORT
141 select SPL_DRIVERS_MISC_SUPPORT
142 select DEBUG_UART_BOARD_INIT
143 select BOARD_LATE_INIT
144 select ROCKCHIP_BROM_HELPER
146 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
147 and quad-core Cortex-A53.
148 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
149 video interfaces supporting HDMI and eDP, several DDR3 options
150 and video codec support. Peripherals include Gigabit Ethernet,
151 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
153 config ROCKCHIP_RV1108
154 bool "Support Rockchip RV1108"
157 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
160 config SPL_ROCKCHIP_BACK_TO_BROM
161 bool "SPL returns to bootrom"
162 default y if ROCKCHIP_RK3036
163 select ROCKCHIP_BROM_HELPER
166 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
167 SPL will return to the boot rom, which will then load the U-Boot
168 binary to keep going on.
170 config TPL_ROCKCHIP_BACK_TO_BROM
171 bool "TPL returns to bootrom"
172 default y if ROCKCHIP_RK3368
173 select ROCKCHIP_BROM_HELPER
176 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
177 SPL will return to the boot rom, which will then load the U-Boot
178 binary to keep going on.
180 config ROCKCHIP_BOOT_MODE_REG
181 hex "Rockchip boot mode flag register address"
182 default 0x200081c8 if ROCKCHIP_RK3036
183 default 0x20004040 if ROCKCHIP_RK3188
184 default 0x110005c8 if ROCKCHIP_RK322X
185 default 0xff730094 if ROCKCHIP_RK3288
186 default 0xff738200 if ROCKCHIP_RK3368
187 default 0xff320300 if ROCKCHIP_RK3399
188 default 0x10300580 if ROCKCHIP_RV1108
191 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
192 according to the value from this register.
194 config ROCKCHIP_SPL_RESERVE_IRAM
195 hex "Size of IRAM reserved in SPL"
198 SPL may need reserve memory for firmware loaded by SPL, whose load
199 address is in IRAM and may overlay with SPL text area if not
202 config ROCKCHIP_BROM_HELPER
205 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
206 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
207 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
209 Some Rockchip BROM variants (e.g. on the RK3188) load the
210 first stage in segments and enter multiple times. E.g. on
211 the RK3188, the first 1KB of the first stage are loaded
212 first and entered; after returning to the BROM, the
213 remainder of the first stage is loaded, but the BROM
214 re-enters at the same address/to the same code as previously.
216 This enables support code in the BOOT0 hook for the SPL stage
217 to allow multiple entries.
219 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
220 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
221 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
223 Some Rockchip BROM variants (e.g. on the RK3188) load the
224 first stage in segments and enter multiple times. E.g. on
225 the RK3188, the first 1KB of the first stage are loaded
226 first and entered; after returning to the BROM, the
227 remainder of the first stage is loaded, but the BROM
228 re-enters at the same address/to the same code as previously.
230 This enables support code in the BOOT0 hook for the TPL stage
231 to allow multiple entries.
233 config SPL_MMC_SUPPORT
234 default y if !SPL_ROCKCHIP_BACK_TO_BROM
236 source "arch/arm/mach-rockchip/rk3036/Kconfig"
237 source "arch/arm/mach-rockchip/rk3128/Kconfig"
238 source "arch/arm/mach-rockchip/rk3188/Kconfig"
239 source "arch/arm/mach-rockchip/rk322x/Kconfig"
240 source "arch/arm/mach-rockchip/rk3288/Kconfig"
241 source "arch/arm/mach-rockchip/rk3328/Kconfig"
242 source "arch/arm/mach-rockchip/rk3368/Kconfig"
243 source "arch/arm/mach-rockchip/rk3399/Kconfig"
244 source "arch/arm/mach-rockchip/rv1108/Kconfig"