4 bool "Support Rockchip RK3036"
9 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
10 including NEON and GPU, Mali-400 graphics, several DDR3 options
11 and video codec support. Peripherals include Gigabit Ethernet,
12 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
14 config ROCKCHIP_RK3128
15 bool "Support Rockchip RK3128"
18 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
19 including NEON and GPU, Mali-400 graphics, several DDR3 options
20 and video codec support. Peripherals include Gigabit Ethernet,
21 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
23 config ROCKCHIP_RK3188
24 bool "Support Rockchip RK3188"
26 select SPL_BOARD_INIT if SPL
34 select SPL_DRIVERS_MISC_SUPPORT
35 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
36 select BOARD_LATE_INIT
37 select ROCKCHIP_BROM_HELPER
39 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
40 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
41 video interfaces, several memory options and video codec support.
42 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
43 UART, SPI, I2C and PWMs.
45 config ROCKCHIP_RK322X
46 bool "Support Rockchip RK3228/RK3229"
50 select ROCKCHIP_BROM_HELPER
51 select DEBUG_UART_BOARD_INIT
53 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
54 including NEON and GPU, Mali-400 graphics, several DDR3 options
55 and video codec support. Peripherals include Gigabit Ethernet,
56 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
58 config ROCKCHIP_RK3288
59 bool "Support Rockchip RK3288"
61 select SPL_BOARD_INIT if SPL
64 imply USB_FUNCTION_ROCKUSB
67 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
68 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
69 video interfaces supporting HDMI and eDP, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
73 config ROCKCHIP_RK3328
74 bool "Support Rockchip RK3328"
77 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
78 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
79 video interfaces supporting HDMI and eDP, several DDR3 options
80 and video codec support. Peripherals include Gigabit Ethernet,
81 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
83 config ROCKCHIP_RK3368
84 bool "Support Rockchip RK3368"
88 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
89 select TPL_NEEDS_SEPARATE_STACK if TPL
90 imply SPL_SEPARATE_BSS
91 imply SPL_SERIAL_SUPPORT
92 imply TPL_SERIAL_SUPPORT
93 select DEBUG_UART_BOARD_INIT
96 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
97 into a big and little cluster with 4 cores each) Cortex-A53 including
98 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
99 (for the little cluster), PowerVR G6110 based graphics, one video
100 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
103 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
104 I2S, UARTs, SPI, I2C and PWMs.
109 default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
122 config ROCKCHIP_RK3399
123 bool "Support Rockchip RK3399"
127 select SPL_SEPARATE_BSS
128 select SPL_SERIAL_SUPPORT
129 select SPL_DRIVERS_MISC_SUPPORT
130 select DEBUG_UART_BOARD_INIT
131 select BOARD_LATE_INIT
132 select ROCKCHIP_BROM_HELPER
134 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
135 and quad-core Cortex-A53.
136 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
137 video interfaces supporting HDMI and eDP, several DDR3 options
138 and video codec support. Peripherals include Gigabit Ethernet,
139 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
141 config ROCKCHIP_RV1108
142 bool "Support Rockchip RV1108"
145 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
148 config SPL_ROCKCHIP_BACK_TO_BROM
149 bool "SPL returns to bootrom"
150 default y if ROCKCHIP_RK3036
151 select ROCKCHIP_BROM_HELPER
154 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
155 SPL will return to the boot rom, which will then load the U-Boot
156 binary to keep going on.
158 config TPL_ROCKCHIP_BACK_TO_BROM
159 bool "TPL returns to bootrom"
160 default y if ROCKCHIP_RK3368
161 select ROCKCHIP_BROM_HELPER
164 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
165 SPL will return to the boot rom, which will then load the U-Boot
166 binary to keep going on.
168 config ROCKCHIP_BOOT_MODE_REG
169 hex "Rockchip boot mode flag register address"
170 default 0x200081c8 if ROCKCHIP_RK3036
171 default 0x20004040 if ROCKCHIP_RK3188
172 default 0x110005c8 if ROCKCHIP_RK322X
173 default 0xff730094 if ROCKCHIP_RK3288
174 default 0xff738200 if ROCKCHIP_RK3368
175 default 0xff320300 if ROCKCHIP_RK3399
176 default 0x10300580 if ROCKCHIP_RV1108
179 The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
180 according to the value from this register.
182 config ROCKCHIP_SPL_RESERVE_IRAM
183 hex "Size of IRAM reserved in SPL"
186 SPL may need reserve memory for firmware loaded by SPL, whose load
187 address is in IRAM and may overlay with SPL text area if not
190 config ROCKCHIP_BROM_HELPER
193 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
194 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
195 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
197 Some Rockchip BROM variants (e.g. on the RK3188) load the
198 first stage in segments and enter multiple times. E.g. on
199 the RK3188, the first 1KB of the first stage are loaded
200 first and entered; after returning to the BROM, the
201 remainder of the first stage is loaded, but the BROM
202 re-enters at the same address/to the same code as previously.
204 This enables support code in the BOOT0 hook for the SPL stage
205 to allow multiple entries.
207 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
208 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
209 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
211 Some Rockchip BROM variants (e.g. on the RK3188) load the
212 first stage in segments and enter multiple times. E.g. on
213 the RK3188, the first 1KB of the first stage are loaded
214 first and entered; after returning to the BROM, the
215 remainder of the first stage is loaded, but the BROM
216 re-enters at the same address/to the same code as previously.
218 This enables support code in the BOOT0 hook for the TPL stage
219 to allow multiple entries.
221 config SPL_MMC_SUPPORT
222 default y if !SPL_ROCKCHIP_BACK_TO_BROM
224 source "arch/arm/mach-rockchip/rk3036/Kconfig"
225 source "arch/arm/mach-rockchip/rk3128/Kconfig"
226 source "arch/arm/mach-rockchip/rk3188/Kconfig"
227 source "arch/arm/mach-rockchip/rk322x/Kconfig"
228 source "arch/arm/mach-rockchip/rk3288/Kconfig"
229 source "arch/arm/mach-rockchip/rk3328/Kconfig"
230 source "arch/arm/mach-rockchip/rk3368/Kconfig"
231 source "arch/arm/mach-rockchip/rk3399/Kconfig"
232 source "arch/arm/mach-rockchip/rv1108/Kconfig"