2 * ./arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
4 * Copyright (C) 2015 Renesas Electronics Corporation
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ASM_ARCH_RCAR_GEN3_BASE_H
10 #define __ASM_ARCH_RCAR_GEN3_BASE_H
13 * R-Car (R8A7750) I/O Addresses
15 #define RWDT_BASE 0xE6020000
16 #define SWDT_BASE 0xE6030000
17 #define LBSC_BASE 0xEE220200
18 #define TMU_BASE 0xE61E0000
19 #define GPIO5_BASE 0xE6055000
22 #define SCIF0_BASE 0xE6E60000
23 #define SCIF1_BASE 0xE6E68000
24 #define SCIF2_BASE 0xE6E88000
25 #define SCIF3_BASE 0xE6C50000
26 #define SCIF4_BASE 0xE6C40000
27 #define SCIF5_BASE 0xE6F30000
29 /* Module stop status register */
30 #define MSTPSR0 0xE6150030
31 #define MSTPSR1 0xE6150038
32 #define MSTPSR2 0xE6150040
33 #define MSTPSR3 0xE6150048
34 #define MSTPSR4 0xE615004C
35 #define MSTPSR5 0xE615003C
36 #define MSTPSR6 0xE61501C0
37 #define MSTPSR7 0xE61501C4
38 #define MSTPSR8 0xE61509A0
39 #define MSTPSR9 0xE61509A4
40 #define MSTPSR10 0xE61509A8
41 #define MSTPSR11 0xE61509AC
43 /* Realtime module stop control register */
44 #define RMSTPCR0 0xE6150110
45 #define RMSTPCR1 0xE6150114
46 #define RMSTPCR2 0xE6150118
47 #define RMSTPCR3 0xE615011C
48 #define RMSTPCR4 0xE6150120
49 #define RMSTPCR5 0xE6150124
50 #define RMSTPCR6 0xE6150128
51 #define RMSTPCR7 0xE615012C
52 #define RMSTPCR8 0xE6150980
53 #define RMSTPCR9 0xE6150984
54 #define RMSTPCR10 0xE6150988
55 #define RMSTPCR11 0xE615098C
57 /* System module stop control register */
58 #define SMSTPCR0 0xE6150130
59 #define SMSTPCR1 0xE6150134
60 #define SMSTPCR2 0xE6150138
61 #define SMSTPCR3 0xE615013C
62 #define SMSTPCR4 0xE6150140
63 #define SMSTPCR5 0xE6150144
64 #define SMSTPCR6 0xE6150148
65 #define SMSTPCR7 0xE615014C
66 #define SMSTPCR8 0xE6150990
67 #define SMSTPCR9 0xE6150994
68 #define SMSTPCR10 0xE6150998
69 #define SMSTPCR11 0xE615099C
72 #define CONFIG_SYS_SH_SDHI0_BASE 0xEE100000
73 #define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
74 #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000
75 #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000
78 #define PFC_PUEN6 0xE6060418
79 #define PUEN_USB1_OVC (1 << 2)
80 #define PUEN_USB1_PWEN (1 << 1)
83 #define CONFIG_SYS_I2C_SH_BASE0 0xE60B0000
86 #include <asm/types.h>
103 #endif /* __ASM_ARCH_RCAR_GEN3_BASE_H */