5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Moahmmed Khasim <khasim@ti.com>
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 * Alex Zuepke <azu@sysgo.de>
14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
16 * SPDX-License-Identifier: GPL-2.0+
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/clock.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
29 * Nothing really to do with interrupts, just starts up a counter.
32 #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
33 #define TIMER_OVERFLOW_VAL 0xffffffff
34 #define TIMER_LOAD_VAL 0
38 /* start the counter ticking up, reload value on overflow */
39 writel(TIMER_LOAD_VAL, &timer_base->tldr);
41 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
48 * timer without interrupts
50 ulong get_timer(ulong base)
52 return get_timer_masked() - base;
55 /* delay x useconds */
56 void __udelay(unsigned long usec)
58 long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
59 unsigned long now, last = readl(&timer_base->tcrr);
62 now = readl(&timer_base->tcrr);
63 if (last > now) /* count up timer overflow */
64 tmo -= TIMER_OVERFLOW_VAL - last + now + 1;
71 ulong get_timer_masked(void)
73 /* current tick value */
74 ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
76 if (now >= gd->arch.lastinc) { /* normal mode (non roll) */
77 /* move stamp fordward with absoulte diff ticks */
78 gd->arch.tbl += (now - gd->arch.lastinc);
79 } else { /* we have rollover of incrementer */
80 gd->arch.tbl += ((TIMER_OVERFLOW_VAL / (TIMER_CLOCK /
81 CONFIG_SYS_HZ)) - gd->arch.lastinc) + now;
83 gd->arch.lastinc = now;
88 * This function is derived from PowerPC code (read timebase as long long).
89 * On ARM it just returns the timer value.
91 unsigned long long get_ticks(void)
97 * This function is derived from PowerPC code (timebase clock frequency).
98 * On ARM it returns the number of timer ticks per second.
100 ulong get_tbclk(void)
102 return CONFIG_SYS_HZ;