arm: omap5: Fix generation of reserved-memory DT node
[oweals/u-boot.git] / arch / arm / mach-omap2 / omap5 / sec-fxns.c
1 /*
2  *
3  * Security related functions for OMAP5 class devices
4  *
5  * (C) Copyright 2016
6  * Texas Instruments, <www.ti.com>
7  *
8  * Daniel Allred <d-allred@ti.com>
9  * Harinarayan Bhatta <harinarayan@ti.com>
10  *
11  * SPDX-License-Identifier: GPL-2.0+
12  */
13
14 #include <common.h>
15 #include <stdarg.h>
16
17 #include <asm/arch/sys_proto.h>
18 #include <asm/omap_common.h>
19 #include <asm/omap_sec_common.h>
20 #include <asm/spl.h>
21 #include <spl.h>
22 #include <asm/cache.h>
23 #include <mapmem.h>
24 #include <tee/optee.h>
25
26 /* Index for signature PPA-based TI HAL APIs */
27 #define PPA_HAL_SERVICES_START_INDEX        (0x200)
28 #define PPA_SERV_HAL_TEE_LOAD_MASTER        (PPA_HAL_SERVICES_START_INDEX + 23)
29 #define PPA_SERV_HAL_TEE_LOAD_SLAVE         (PPA_HAL_SERVICES_START_INDEX + 24)
30 #define PPA_SERV_HAL_SETUP_SEC_RESVD_REGION (PPA_HAL_SERVICES_START_INDEX + 25)
31 #define PPA_SERV_HAL_SETUP_EMIF_FW_REGION   (PPA_HAL_SERVICES_START_INDEX + 26)
32 #define PPA_SERV_HAL_LOCK_EMIF_FW           (PPA_HAL_SERVICES_START_INDEX + 27)
33
34 int tee_loaded = 0;
35
36 /* Argument for PPA_SERV_HAL_TEE_LOAD_MASTER */
37 struct ppa_tee_load_info {
38         u32 tee_sec_mem_start; /* Physical start address reserved for TEE */
39         u32 tee_sec_mem_size;  /* Size of the memory reserved for TEE */
40         u32 tee_cert_start;    /* Address where signed TEE binary is loaded */
41         u32 tee_cert_size;     /* Size of TEE certificate (signed binary) */
42         u32 tee_jump_addr;     /* Address to jump to start TEE execution */
43         u32 tee_arg0;          /* argument to TEE jump function, in r0 */
44 };
45
46 static u32 get_sec_mem_start(void)
47 {
48         u32 sec_mem_start = CONFIG_TI_SECURE_EMIF_REGION_START;
49         u32 sec_mem_size = CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE;
50         /*
51          * Total reserved region is all contiguous with protected
52          * region coming first, followed by the non-secure region.
53          * If 0x0 start address is given, we simply put the reserved
54          * region at the end of the external DRAM.
55          */
56         if (sec_mem_start == 0)
57                 sec_mem_start =
58                         (CONFIG_SYS_SDRAM_BASE +
59                         (omap_sdram_size() - sec_mem_size));
60         return sec_mem_start;
61 }
62
63 int secure_emif_firewall_setup(uint8_t region_num, uint32_t start_addr,
64                                uint32_t size, uint32_t access_perm,
65                                uint32_t initiator_perm)
66 {
67         int result = 1;
68
69         /*
70          * Call PPA HAL API to do any other general firewall
71          * configuration for regions 1-6 of the EMIF firewall.
72          */
73         debug("%s: regionNum = %x, startAddr = %x, size = %x", __func__,
74               region_num, start_addr, size);
75
76         result = secure_rom_call(
77                         PPA_SERV_HAL_SETUP_EMIF_FW_REGION, 0, 0, 4,
78                         (start_addr & 0xFFFFFFF0) | (region_num & 0x0F),
79                         size, access_perm, initiator_perm);
80
81         if (result != 0) {
82                 puts("Secure EMIF Firewall Setup failed!\n");
83                 debug("Return Value = %x\n", result);
84         }
85
86         return result;
87 }
88
89 #if     (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE <  \
90         CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE)
91 #error  "TI Secure EMIF: Protected size cannot be larger than total size."
92 #endif
93 int secure_emif_reserve(void)
94 {
95         int result = 1;
96         u32 sec_mem_start = get_sec_mem_start();
97         u32 sec_prot_size = CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE;
98
99         /* If there is no protected region, there is no reservation to make */
100         if (sec_prot_size == 0)
101                 return 0;
102
103         /*
104          * Call PPA HAL API to reserve a chunk of EMIF SDRAM
105          * for secure world use. This region should be carved out
106          * from use by any public code. EMIF firewall region 7
107          * will be used to protect this block of memory.
108          */
109         result = secure_rom_call(
110                         PPA_SERV_HAL_SETUP_SEC_RESVD_REGION,
111                         0, 0, 2, sec_mem_start, sec_prot_size);
112
113         if (result != 0) {
114                 puts("SDRAM Firewall: Secure memory reservation failed!\n");
115                 debug("Return Value = %x\n", result);
116         }
117
118         return result;
119 }
120
121 int secure_emif_firewall_lock(void)
122 {
123         int result = 1;
124
125         /*
126          * Call PPA HAL API to lock the EMIF firewall configurations.
127          * After this API is called, none of the PPA HAL APIs for
128          * configuring the EMIF firewalls will be usable again (that
129          * is, calls to those APIs will return failure and have no
130          * effect).
131          */
132
133         result = secure_rom_call(
134                         PPA_SERV_HAL_LOCK_EMIF_FW,
135                         0, 0, 0);
136
137         if (result != 0) {
138                 puts("Secure EMIF Firewall Lock failed!\n");
139                 debug("Return Value = %x\n", result);
140         }
141
142         return result;
143 }
144
145 static struct ppa_tee_load_info tee_info __aligned(ARCH_DMA_MINALIGN);
146
147 int secure_tee_install(u32 addr)
148 {
149         struct optee_header *hdr;
150         void *loadptr;
151         u32 tee_file_size;
152         u32 sec_mem_start = get_sec_mem_start();
153         const u32 size = CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE;
154         u32 *smc_cpu1_params;
155         u32 ret;
156
157         /* If there is no protected region, there is no place to put the TEE */
158         if (size == 0) {
159                 printf("Error loading TEE, no protected memory region available\n");
160                 return -ENOBUFS;
161         }
162
163         hdr = (struct optee_header *)map_sysmem(addr, sizeof(struct optee_header));
164         /* 280 bytes = size of signature */
165         tee_file_size = hdr->init_size + hdr->paged_size +
166                         sizeof(struct optee_header) + 280;
167
168         if ((hdr->magic != OPTEE_MAGIC) ||
169             (hdr->version != OPTEE_VERSION) ||
170             (hdr->init_load_addr_hi != 0) ||
171             (hdr->init_load_addr_lo < (sec_mem_start + sizeof(struct optee_header))) ||
172             (tee_file_size > size) ||
173             ((hdr->init_load_addr_lo + tee_file_size - 1) >
174              (sec_mem_start + size - 1))) {
175                 printf("Error in TEE header. Check load address and sizes\n");
176                 unmap_sysmem(hdr);
177                 return CMD_RET_FAILURE;
178         }
179
180         tee_info.tee_sec_mem_start = sec_mem_start;
181         tee_info.tee_sec_mem_size = size;
182         tee_info.tee_jump_addr = hdr->init_load_addr_lo;
183         tee_info.tee_cert_start = addr;
184         tee_info.tee_cert_size = tee_file_size;
185         tee_info.tee_arg0 = hdr->init_size + tee_info.tee_jump_addr;
186         unmap_sysmem(hdr);
187         loadptr = map_sysmem(addr, tee_file_size);
188
189         debug("tee_info.tee_sec_mem_start= %08X\n", tee_info.tee_sec_mem_start);
190         debug("tee_info.tee_sec_mem_size = %08X\n", tee_info.tee_sec_mem_size);
191         debug("tee_info.tee_jump_addr = %08X\n", tee_info.tee_jump_addr);
192         debug("tee_info.tee_cert_start = %08X\n", tee_info.tee_cert_start);
193         debug("tee_info.tee_cert_size = %08X\n", tee_info.tee_cert_size);
194         debug("tee_info.tee_arg0 = %08X\n", tee_info.tee_arg0);
195         debug("tee_file_size = %d\n", tee_file_size);
196
197 #if !defined(CONFIG_SYS_DCACHE_OFF)
198         flush_dcache_range(
199                 rounddown((u32)loadptr, ARCH_DMA_MINALIGN),
200                 roundup((u32)loadptr + tee_file_size, ARCH_DMA_MINALIGN));
201
202         flush_dcache_range((u32)&tee_info, (u32)&tee_info +
203                         roundup(sizeof(tee_info), ARCH_DMA_MINALIGN));
204 #endif
205         unmap_sysmem(loadptr);
206
207         ret = secure_rom_call(PPA_SERV_HAL_TEE_LOAD_MASTER, 0, 0, 1, &tee_info);
208         if (ret) {
209                 printf("TEE_LOAD_MASTER Failed\n");
210                 return ret;
211         }
212         printf("TEE_LOAD_MASTER Done\n");
213
214         if (!is_dra72x()) {
215                 /* Reuse the tee_info buffer for SMC params */
216                 smc_cpu1_params = (u32 *)&tee_info;
217                 smc_cpu1_params[0] = 0;
218 #if !defined(CONFIG_SYS_DCACHE_OFF)
219                 flush_dcache_range((u32)smc_cpu1_params, (u32)smc_cpu1_params +
220                                 roundup(sizeof(u32), ARCH_DMA_MINALIGN));
221 #endif
222                 ret = omap_smc_sec_cpu1(PPA_SERV_HAL_TEE_LOAD_SLAVE, 0, 0,
223                                 smc_cpu1_params);
224                 if (ret) {
225                         printf("TEE_LOAD_SLAVE Failed\n");
226                         return ret;
227                 }
228                 printf("TEE_LOAD_SLAVE Done\n");
229         }
230
231         tee_loaded = 1;
232
233         return 0;
234 }