2 * This file configures the internal USB PHY in AM35X.
4 * Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
6 * Based on omap_phy_internal.c code from Linux by
7 * Hema HK <hemahk@ti.com>
9 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/am35x_def.h>
16 void am35x_musb_reset(struct udevice *dev)
18 /* Reset the musb interface */
19 clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
21 clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
25 void am35x_musb_phy_power(struct udevice *dev, u8 on)
27 unsigned long start = get_timer(0);
31 * Start the on-chip PHY and its PLL.
33 clrsetbits_le32(&am35x_scm_general_regs->devconf2,
34 CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
37 debug("Waiting for PHY clock good...\n");
38 while (!(readl(&am35x_scm_general_regs->devconf2)
41 if (get_timer(start) > CONFIG_SYS_HZ / 10) {
42 printf("musb PHY clock good timed out\n");
48 * Power down the on-chip PHY.
50 clrsetbits_le32(&am35x_scm_general_regs->devconf2,
52 CONF2_PHYPWRDN | CONF2_OTGPWRDN);
56 void am35x_musb_clear_irq(struct udevice *dev)
58 clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
60 readl(&am35x_scm_general_regs->lvl_intr_clr);