1 // SPDX-License-Identifier: GPL-2.0+
3 * This file configures the internal USB PHY in AM35X.
5 * Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
7 * Based on omap_phy_internal.c code from Linux by
8 * Hema HK <hemahk@ti.com>
13 #include <asm/arch/am35x_def.h>
15 void am35x_musb_reset(struct udevice *dev)
17 /* Reset the musb interface */
18 clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
20 clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
24 void am35x_musb_phy_power(struct udevice *dev, u8 on)
26 unsigned long start = get_timer(0);
30 * Start the on-chip PHY and its PLL.
32 clrsetbits_le32(&am35x_scm_general_regs->devconf2,
33 CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
36 debug("Waiting for PHY clock good...\n");
37 while (!(readl(&am35x_scm_general_regs->devconf2)
40 if (get_timer(start) > CONFIG_SYS_HZ / 10) {
41 printf("musb PHY clock good timed out\n");
47 * Power down the on-chip PHY.
49 clrsetbits_le32(&am35x_scm_general_regs->devconf2,
51 CONF2_PHYPWRDN | CONF2_OTGPWRDN);
55 void am35x_musb_clear_irq(struct udevice *dev)
57 clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
59 readl(&am35x_scm_general_regs->lvl_intr_clr);