4 * Clock synthesizer apis
6 * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/clk_synthesizer.h>
17 * clk_synthesizer_reg_read - Read register from synthesizer.
18 * @addr: addr within the i2c device
19 * buf: Buffer to which value is to be read.
21 * For reading the register from this clock synthesizer, a command needs to
22 * be send along with enabling byte read more, and then read can happen.
23 * Returns 0 on success
25 static int clk_synthesizer_reg_read(int addr, uint8_t *buf)
30 addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
32 /* Send the command byte */
33 rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
35 printf("Failed to send command to clock synthesizer\n");
38 return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
42 * clk_synthesizer_reg_write - Write a value to register in synthesizer.
43 * @addr: addr within the i2c device
44 * val: Value to be written in the addr.
46 * Enable the byte read mode in the address and start the i2c transfer.
47 * Returns 0 on success
49 static int clk_synthesizer_reg_write(int addr, uint8_t val)
54 /* Enable byte write */
55 cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
58 rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
60 printf("Clock synthesizer reg write failed at addr = 0x%x\n",
66 * setup_clock_syntherizer - Program the clock synthesizer to get the desired
68 * @data: Data containing the desired output
70 * This is a PLL-based high performance synthesizer which gives 3 outputs
71 * as per the PLL_DIV and load capacitor programmed.
73 int setup_clock_synthesizer(struct clk_synth *data)
78 rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
80 printf("i2c probe failed at address 0x%x\n",
81 CLK_SYNTHESIZER_I2C_ADDR);
85 rc = clk_synthesizer_reg_read(CLK_SYNTHESIZER_ID_REG, &val);
89 /* Crystal Load capacitor selection */
90 rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_XCSEL, data->capacitor);
93 rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_MUX_REG, data->mux);
96 rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV2_REG, data->pdiv2);
99 rc = clk_synthesizer_reg_write(CLK_SYNTHESIZER_PDIV3_REG, data->pdiv3);