2 * Copyright (C) Marvell International Ltd. and its affiliates
4 * SPDX-License-Identifier: GPL-2.0
10 #include <asm/arch/cpu.h>
11 #include <asm/arch/soc.h>
14 #include "high_speed_env_spec.h"
16 #include "../../../drivers/ddr/marvell/a38x/ddr3_init.h"
18 #if defined(MV_DEBUG_INIT_FULL) || defined(MV_DEBUG)
24 /* Array for mapping the operation (write, poll or delay) functions */
25 op_execute_func_ptr op_execute_func_arr[] = {
31 int write_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
33 u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr;
35 /* Getting write op params from the input parameter */
36 data = params->data[data_arr_idx];
39 /* an empty operation */
43 /* get updated base address since it can be different between Serdes */
44 CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
46 &unit_base_reg, &unit_offset));
48 /* Address calculation */
49 reg_addr = unit_base_reg + unit_offset * serdes_num;
52 printf("Write: 0x%x: 0x%x (mask 0x%x) - ", reg_addr, data, mask);
54 /* Reading old value */
55 reg_data = reg_read(reg_addr);
58 /* Writing new data */
61 reg_write(reg_addr, reg_data);
64 printf(" - 0x%x\n", reg_data);
70 int delay_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
74 /* Getting delay op params from the input parameter */
75 delay = params->wait_time;
77 printf("Delay: %d\n", delay);
84 int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
86 u32 unit_base_reg, unit_offset, data, mask, num_of_loops, wait_time;
88 u32 reg_addr, reg_data;
90 /* Getting poll op params from the input parameter */
91 data = params->data[data_arr_idx];
93 num_of_loops = params->num_of_loops;
94 wait_time = params->wait_time;
96 /* an empty operation */
100 /* get updated base address since it can be different between Serdes */
101 CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
103 &unit_base_reg, &unit_offset));
105 /* Address calculation */
106 reg_addr = unit_base_reg + unit_offset * serdes_num;
110 printf("Poll: 0x%x: 0x%x (mask 0x%x)\n", reg_addr, data, mask);
114 reg_data = reg_read(reg_addr) & mask;
117 } while ((reg_data != data) && (poll_counter < num_of_loops));
119 if ((poll_counter >= num_of_loops) && (reg_data != data)) {
120 DEBUG_INIT_S("poll_op_execute: TIMEOUT\n");
127 enum mv_op get_cfg_seq_op(struct op_params *params)
129 if (params->wait_time == 0)
131 else if (params->num_of_loops == 0)
137 int mv_seq_exec(u32 serdes_num, u32 seq_id)
140 struct op_params *seq_arr;
145 DB(printf("\n### mv_seq_exec ###\n"));
146 DB(printf("seq id: %d\n", seq_id));
148 if (hws_is_serdes_active(serdes_num) != 1) {
149 printf("mv_seq_exec_ext:Error: SerDes lane %d is not valid\n",
154 seq_arr = serdes_seq_db[seq_id].op_params_ptr;
155 seq_size = serdes_seq_db[seq_id].cfg_seq_size;
156 data_arr_idx = serdes_seq_db[seq_id].data_arr_idx;
158 DB(printf("seq_size: %d\n", seq_size));
159 DB(printf("data_arr_idx: %d\n", data_arr_idx));
161 /* Executing the sequence operations */
162 for (seq_idx = 0; seq_idx < seq_size; seq_idx++) {
163 curr_op = get_cfg_seq_op(&seq_arr[seq_idx]);
164 op_execute_func_arr[curr_op](serdes_num, &seq_arr[seq_idx],