1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2016 Marvell International Ltd.
6 #include <asm/arch-armada8k/cache_llc.h>
7 #include <linux/linkage.h>
10 * int __asm_flush_l3_dcache
12 * flush Armada-8K last level cache.
15 ENTRY(__asm_flush_l3_dcache)
17 mov x0, #LLC_BASE_ADDR
18 add x0, x0, #LLC_FLUSH_BY_WAY
19 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
23 mov x0, #LLC_BASE_ADDR
24 add x0, x0, #LLC_CACHE_SYNC
25 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
27 /* check that cache sync completed */
28 mov x0, #LLC_BASE_ADDR
29 add x0, x0, #LLC_CACHE_SYNC_COMPLETE
30 movk x0, #MVEBU_A8K_REGS_BASE_MSB, lsl #16
32 and w1, w1, #LLC_CACHE_SYNC_MASK
37 ENDPROC(__asm_flush_l3_dcache)