2 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/gxbb.h>
11 #include <asm/arch/sm.h>
12 #include <asm/armv8/mmu.h>
13 #include <asm/unaligned.h>
15 DECLARE_GLOBAL_DATA_PTR;
23 offset = fdt_path_offset(gd->fdt_blob, "/memory");
27 val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
28 if (len < sizeof(*val) * 2)
31 /* Use unaligned access since cache is still disabled */
32 gd->ram_size = get_unaligned_be64(&val[1]);
37 int dram_init_banksize(void)
39 /* Reserve first 16 MiB of RAM for firmware */
40 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024);
41 gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
46 void reset_cpu(ulong addr)
51 static struct mm_region gxbb_mem_map[] = {
56 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
62 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
64 PTE_BLOCK_PXN | PTE_BLOCK_UXN
71 struct mm_region *mem_map = gxbb_mem_map;