arch/arm/mach-mediatek/mt8518/init.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Configuration for MediaTek MT8518 SoC
   4  *
   5  * Copyright (C) 2019 MediaTek Inc.
   6  * Author: Mingming Lee <mingming.lee@mediatek.com>
   7  */
   8
   9 #include <clk.h>
  10 #include <common.h>
  11 #include <cpu_func.h>
  12 #include <dm.h>
  13 #include <fdtdec.h>
  14 #include <ram.h>
  15 #include <asm/arch/misc.h>
  16 #include <asm/armv8/mmu.h>
  17 #include <asm/sections.h>
  18 #include <dm/uclass.h>
  19 #include <dt-bindings/clock/mt8518-clk.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 int dram_init(void)
  24 {
  25         int ret;
  26
  27         ret = fdtdec_setup_memory_banksize();
  28         if (ret)
  29                 return ret;
  30
  31         return fdtdec_setup_mem_size_base();
  32 }
  33
  34 int dram_init_banksize(void)
  35 {
  36         gd->bd->bi_dram[0].start = gd->ram_base;
  37         gd->bd->bi_dram[0].size = gd->ram_size;
  38
  39         return 0;
  40 }
  41
  42 void reset_cpu(ulong addr)
  43 {
  44         psci_system_reset();
  45 }
  46
  47 int print_cpuinfo(void)
  48 {
  49         printf("CPU:   MediaTek MT8518\n");
  50         return 0;
  51 }
  52
  53 static struct mm_region mt8518_mem_map[] = {
  54         {
  55                 /* DDR */
  56                 .virt = 0x40000000UL,
  57                 .phys = 0x40000000UL,
  58                 .size = 0x20000000UL,
  59                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
  60         }, {
  61                 .virt = 0x00000000UL,
  62                 .phys = 0x00000000UL,
  63                 .size = 0x20000000UL,
  64                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  65                          PTE_BLOCK_NON_SHARE |
  66                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  67         }, {
  68                 0,
  69         }
  70 };
  71
  72 struct mm_region *mem_map = mt8518_mem_map;