1 // SPDX-License-Identifier: GPL-2.0+
3 * K3: Common Architecture initialization
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
17 #include <remoteproc.h>
18 #include <asm/cache.h>
19 #include <linux/soc/ti/ti_sci_protocol.h>
20 #include <fdt_support.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/hardware.h>
24 #include <fs_loader.h>
29 struct ti_sci_handle *get_ti_sci_handle(void)
34 ret = uclass_get_device_by_driver(UCLASS_FIRMWARE,
35 DM_GET_DRIVER(ti_sci), &dev);
37 panic("Failed to get SYSFW (%d)\n", ret);
39 return (struct ti_sci_handle *)ti_sci_get_handle_from_sysfw(dev);
42 void k3_sysfw_print_ver(void)
44 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
45 char fw_desc[sizeof(ti_sci->version.firmware_description) + 1];
48 * Output System Firmware version info. Note that since the
49 * 'firmware_description' field is not guaranteed to be zero-
50 * terminated we manually add a \0 terminator if needed. Further
51 * note that we intentionally no longer rely on the extended
52 * printf() formatter '%.*s' to not having to require a more
53 * full-featured printf() implementation.
55 strncpy(fw_desc, ti_sci->version.firmware_description,
56 sizeof(ti_sci->version.firmware_description));
57 fw_desc[sizeof(fw_desc) - 1] = '\0';
59 printf("SYSFW ABI: %d.%d (firmware rev 0x%04x '%s')\n",
60 ti_sci->version.abi_major, ti_sci->version.abi_minor,
61 ti_sci->version.firmware_revision, fw_desc);
64 DECLARE_GLOBAL_DATA_PTR;
66 #ifdef CONFIG_K3_EARLY_CONS
67 int early_console_init(void)
72 gd->baudrate = CONFIG_BAUDRATE;
74 ret = uclass_get_device_by_seq(UCLASS_SERIAL, CONFIG_K3_EARLY_CONS_IDX,
77 printf("Error getting serial dev for early console! (%d)\n",
82 gd->cur_serial_dev = dev;
83 gd->flags |= GD_FLG_SERIAL_READY;
90 #ifdef CONFIG_SYS_K3_SPL_ATF
94 #ifdef CONFIG_SPL_ENV_SUPPORT
99 switch (spl_boot_device()) {
100 case BOOT_DEVICE_MMC2:
101 part = env_get("bootpart");
102 env_set("storage_interface", "mmc");
103 env_set("fw_dev_part", part);
105 case BOOT_DEVICE_SPI:
106 env_set("storage_interface", "ubi");
107 env_set("fw_ubi_mtdpart", "UBI");
108 env_set("fw_ubi_volume", "UBI0");
111 printf("%s from device %u not supported!\n",
112 __func__, spl_boot_device());
118 #ifdef CONFIG_FS_LOADER
119 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
121 struct udevice *fsdev;
126 #ifdef CONFIG_SPL_ENV_SUPPORT
127 switch (spl_boot_device()) {
128 case BOOT_DEVICE_MMC2:
129 name = env_get(name_fw);
130 *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
133 printf("Loading rproc fw image from device %u not supported!\n",
141 if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
142 size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
149 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
155 __weak void start_non_linux_remote_cores(void)
159 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
161 typedef void __noreturn (*image_entry_noargs_t)(void);
162 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
166 /* Release all the exclusive devices held by SPL before starting ATF */
167 ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
171 panic("rproc failed to be initialized (%d)\n", ret);
174 start_non_linux_remote_cores();
175 size = load_firmware("name_mcur5f0_0fw", "addr_mcur5f0_0load",
180 * It is assumed that remoteproc device 1 is the corresponding
181 * Cortex-A core which runs ATF. Make sure DT reflects the same.
183 ret = rproc_load(1, spl_image->entry_point, 0x200);
185 panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
187 /* Add an extra newline to differentiate the ATF logs from SPL */
188 printf("Starting ATF on ARM64 core...\n\n");
190 ret = rproc_start(1);
192 panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
193 if (!(size > 0 && valid_elf_image(loadaddr))) {
194 debug("Shutting down...\n");
195 release_resources_for_core_shutdown();
201 image_entry_noargs_t image_entry =
202 (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
208 #if defined(CONFIG_OF_LIBFDT)
209 int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
211 u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
212 struct ti_sci_handle *ti_sci = get_ti_sci_handle();
213 int ret, node, subnode, len, prev_node;
214 u32 range[4], addr, size;
215 const fdt32_t *sub_reg;
217 ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
218 msmc_size = msmc_end - msmc_start + 1;
219 debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
220 msmc_start, msmc_size);
222 /* find or create "msmc_sram node */
223 ret = fdt_path_offset(blob, parent_path);
227 node = fdt_find_or_add_subnode(blob, ret, node_name);
231 ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
235 reg[0] = cpu_to_fdt64(msmc_start);
236 reg[1] = cpu_to_fdt64(msmc_size);
237 ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
241 fdt_setprop_cell(blob, node, "#address-cells", 1);
242 fdt_setprop_cell(blob, node, "#size-cells", 1);
245 range[1] = cpu_to_fdt32(msmc_start >> 32);
246 range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
247 range[3] = cpu_to_fdt32(msmc_size);
248 ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
252 subnode = fdt_first_subnode(blob, node);
255 /* Look for invalid subnodes and delete them */
256 while (subnode >= 0) {
257 sub_reg = fdt_getprop(blob, subnode, "reg", &len);
258 addr = fdt_read_number(sub_reg, 1);
260 size = fdt_read_number(sub_reg, 1);
261 debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
262 subnode, addr, size);
263 if (addr + size > msmc_size ||
264 !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
265 !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
266 fdt_del_node(blob, subnode);
267 debug("%s: deleting subnode %d\n", __func__, subnode);
269 subnode = fdt_first_subnode(blob, node);
271 subnode = fdt_next_subnode(blob, prev_node);
274 subnode = fdt_next_subnode(blob, prev_node);
281 int fdt_disable_node(void *blob, char *node_path)
286 offs = fdt_path_offset(blob, node_path);
288 printf("Node %s not found.\n", node_path);
291 ret = fdt_setprop_string(blob, offs, "status", "disabled");
293 printf("Could not add status property to node %s: %s\n",
294 node_path, fdt_strerror(ret));
302 #ifndef CONFIG_SYSRESET
303 void reset_cpu(ulong ignored)
308 #if defined(CONFIG_DISPLAY_CPUINFO)
309 int print_cpuinfo(void)
314 soc = (readl(CTRLMMR_WKUP_JTAG_ID) &
315 JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT;
316 rev = (readl(CTRLMMR_WKUP_JTAG_ID) &
317 JTAG_ID_VARIANT_MASK) >> JTAG_ID_VARIANT_SHIFT;
328 name = "Unknown Silicon";
331 printf("%s SR ", name);
340 name = "Unknown Revision";
342 printf("%s\n", name);
349 void board_prep_linux(bootm_headers_t *images)
351 debug("Linux kernel Image start = 0x%lx end = 0x%lx\n",
352 images->os.start, images->os.end);
353 __asm_flush_dcache_range(images->os.start,
354 ROUND(images->os.end,
355 CONFIG_SYS_CACHELINE_SIZE));
359 #ifdef CONFIG_CPU_V7R
360 void disable_linefill_optimization(void)
365 * On K3 devices there are 2 conditions where R5F can deadlock:
366 * 1.When software is performing series of store operations to
367 * cacheable write back/write allocate memory region and later
368 * on software execute barrier operation (DSB or DMB). R5F may
369 * hang at the barrier instruction.
370 * 2.When software is performing a mix of load and store operations
371 * within a tight loop and store operations are all writing to
372 * cacheable write back/write allocates memory regions, R5F may
373 * hang at one of the load instruction.
375 * To avoid the above two conditions disable linefill optimization
378 asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
379 actlr |= (1 << 13); /* Set DLFO bit */
380 asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
384 void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
386 struct ti_sci_msg_fwl_region region;
387 struct ti_sci_fwl_ops *fwl_ops;
388 struct ti_sci_handle *ti_sci;
391 ti_sci = get_ti_sci_handle();
392 fwl_ops = &ti_sci->ops.fwl_ops;
393 for (i = 0; i < fwl_data_size; i++) {
394 for (j = 0; j < fwl_data[i].regions; j++) {
395 region.fwl_id = fwl_data[i].fwl_id;
397 region.n_permission_regs = 3;
399 fwl_ops->get_fwl_region(ti_sci, ®ion);
401 if (region.control != 0) {
402 pr_debug("Attempting to disable firewall %5d (%25s)\n",
403 region.fwl_id, fwl_data[i].name);
406 if (fwl_ops->set_fwl_region(ti_sci, ®ion))
407 pr_err("Could not disable firewall %5d (%25s)\n",
408 region.fwl_id, fwl_data[i].name);
414 void spl_enable_dcache(void)
416 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
417 phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE;
419 dram_init_banksize();
421 /* reserve TLB table */
422 gd->arch.tlb_size = PGTABLE_SIZE;
424 ram_top += get_effective_memsize();
425 /* keep ram_top in the 32-bit address space */
426 if (ram_top >= 0x100000000)
427 ram_top = (phys_addr_t) 0x100000000;
429 gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
430 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
431 gd->arch.tlb_addr + gd->arch.tlb_size);
437 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
438 void spl_board_prepare_for_boot(void)
443 void spl_board_prepare_for_boot_linux(void)