c956a8092d888be44634bddcea74ce1a122d7684
[oweals/u-boot.git] / arch / arm / mach-imx / imx8 / image.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2019 NXP
4  */
5
6 #include <common.h>
7 #include <errno.h>
8 #include <malloc.h>
9 #include <asm/io.h>
10 #include <mmc.h>
11 #include <spi_flash.h>
12 #include <nand.h>
13 #include <asm/arch/image.h>
14 #include <asm/arch/sys_proto.h>
15 #include <asm/mach-imx/boot_mode.h>
16
17 #define MMC_DEV         0
18 #define QSPI_DEV        1
19 #define NAND_DEV        2
20 #define QSPI_NOR_DEV    3
21
22 static int __get_container_size(ulong addr)
23 {
24         struct container_hdr *phdr;
25         struct boot_img_t *img_entry;
26         struct signature_block_hdr *sign_hdr;
27         u8 i = 0;
28         u32 max_offset = 0, img_end;
29
30         phdr = (struct container_hdr *)addr;
31         if (phdr->tag != 0x87 && phdr->version != 0x0) {
32                 debug("Wrong container header\n");
33                 return -EFAULT;
34         }
35
36         max_offset = sizeof(struct container_hdr);
37
38         img_entry = (struct boot_img_t *)(addr + sizeof(struct container_hdr));
39         for (i = 0; i < phdr->num_images; i++) {
40                 img_end = img_entry->offset + img_entry->size;
41                 if (img_end > max_offset)
42                         max_offset = img_end;
43
44                 debug("img[%u], end = 0x%x\n", i, img_end);
45
46                 img_entry++;
47         }
48
49         if (phdr->sig_blk_offset != 0) {
50                 sign_hdr = (struct signature_block_hdr *)(addr + phdr->sig_blk_offset);
51                 u16 len = sign_hdr->length_lsb + (sign_hdr->length_msb << 8);
52
53                 if (phdr->sig_blk_offset + len > max_offset)
54                         max_offset = phdr->sig_blk_offset + len;
55
56                 debug("sigblk, end = 0x%x\n", phdr->sig_blk_offset + len);
57         }
58
59         return max_offset;
60 }
61
62 static int get_container_size(void *dev, int dev_type, unsigned long offset)
63 {
64         u8 *buf = malloc(CONTAINER_HDR_ALIGNMENT);
65         int ret = 0;
66
67         if (!buf) {
68                 printf("Malloc buffer failed\n");
69                 return -ENOMEM;
70         }
71
72 #ifdef CONFIG_SPL_MMC_SUPPORT
73         if (dev_type == MMC_DEV) {
74                 unsigned long count = 0;
75                 struct mmc *mmc = (struct mmc *)dev;
76
77                 count = blk_dread(mmc_get_blk_desc(mmc),
78                                   offset / mmc->read_bl_len,
79                                   CONTAINER_HDR_ALIGNMENT / mmc->read_bl_len,
80                                   buf);
81                 if (count == 0) {
82                         printf("Read container image from MMC/SD failed\n");
83                         return -EIO;
84                 }
85         }
86 #endif
87
88 #ifdef CONFIG_SPL_SPI_LOAD
89         if (dev_type == QSPI_DEV) {
90                 struct spi_flash *flash = (struct spi_flash *)dev;
91
92                 ret = spi_flash_read(flash, offset,
93                                      CONTAINER_HDR_ALIGNMENT, buf);
94                 if (ret != 0) {
95                         printf("Read container image from QSPI failed\n");
96                         return -EIO;
97                 }
98         }
99 #endif
100
101 #ifdef CONFIG_SPL_NAND_SUPPORT
102         if (dev_type == NAND_DEV) {
103                 ret = nand_spl_load_image(offset, CONTAINER_HDR_ALIGNMENT,
104                                           buf);
105                 if (ret != 0) {
106                         printf("Read container image from NAND failed\n");
107                         return -EIO;
108                 }
109         }
110 #endif
111
112 #ifdef CONFIG_SPL_NOR_SUPPORT
113         if (dev_type == QSPI_NOR_DEV)
114                 memcpy(buf, (const void *)offset, CONTAINER_HDR_ALIGNMENT);
115 #endif
116
117         ret = __get_container_size((ulong)buf);
118
119         free(buf);
120
121         return ret;
122 }
123
124 static unsigned long get_boot_device_offset(void *dev, int dev_type)
125 {
126         unsigned long offset = 0;
127
128         if (dev_type == MMC_DEV) {
129                 struct mmc *mmc = (struct mmc *)dev;
130
131                 if (IS_SD(mmc) || mmc->part_config == MMCPART_NOAVAILABLE) {
132                         offset = CONTAINER_HDR_MMCSD_OFFSET;
133                 } else {
134                         u8 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
135
136                         if (part == 1 || part == 2) {
137                                 if (is_imx8qxp() && is_soc_rev(CHIP_REV_B))
138                                         offset = CONTAINER_HDR_MMCSD_OFFSET;
139                                 else
140                                         offset = CONTAINER_HDR_EMMC_OFFSET;
141                         } else {
142                                 offset = CONTAINER_HDR_MMCSD_OFFSET;
143                         }
144                 }
145         } else if (dev_type == QSPI_DEV) {
146                 offset = CONTAINER_HDR_QSPI_OFFSET;
147         } else if (dev_type == NAND_DEV) {
148                 offset = CONTAINER_HDR_NAND_OFFSET;
149         } else if (dev_type == QSPI_NOR_DEV) {
150                 offset = CONTAINER_HDR_QSPI_OFFSET + 0x08000000;
151         }
152
153         return offset;
154 }
155
156 static int get_imageset_end(void *dev, int dev_type)
157 {
158         unsigned long offset1 = 0, offset2 = 0;
159         int value_container[2];
160
161         offset1 = get_boot_device_offset(dev, dev_type);
162         offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
163
164         value_container[0] = get_container_size(dev, dev_type, offset1);
165         if (value_container[0] < 0) {
166                 printf("Parse seco container failed %d\n", value_container[0]);
167                 return value_container[0];
168         }
169
170         debug("seco container size 0x%x\n", value_container[0]);
171
172         value_container[1] = get_container_size(dev, dev_type, offset2);
173         if (value_container[1] < 0) {
174                 debug("Parse scu container failed %d, only seco container\n",
175                       value_container[1]);
176                 /* return seco container total size */
177                 return value_container[0] + offset1;
178         }
179
180         debug("scu container size 0x%x\n", value_container[1]);
181
182         return value_container[1] + offset2;
183 }
184
185 #ifdef CONFIG_SPL_SPI_LOAD
186 unsigned long spl_spi_get_uboot_offs(struct spi_flash *flash)
187 {
188         int end;
189
190         end = get_imageset_end(flash, QSPI_DEV);
191         end = ROUND(end, SZ_1K);
192
193         printf("Load image from QSPI 0x%x\n", end);
194
195         return end;
196 }
197 #endif
198
199 #ifdef CONFIG_SPL_MMC_SUPPORT
200 unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
201 {
202         int end;
203
204         end = get_imageset_end(mmc, MMC_DEV);
205         end = ROUND(end, SZ_1K);
206
207         printf("Load image from MMC/SD 0x%x\n", end);
208
209         return end / mmc->read_bl_len;
210 }
211 #endif
212
213 #ifdef CONFIG_SPL_NAND_SUPPORT
214 uint32_t spl_nand_get_uboot_raw_page(void)
215 {
216         int end;
217
218         end = get_imageset_end((void *)NULL, NAND_DEV);
219         end = ROUND(end, SZ_16K);
220
221         printf("Load image from NAND 0x%x\n", end);
222
223         return end;
224 }
225 #endif
226
227 #ifdef CONFIG_SPL_NOR_SUPPORT
228 unsigned long spl_nor_get_uboot_base(void)
229 {
230         int end;
231
232         /* Calculate the image set end,
233          * if it is less than CONFIG_SYS_UBOOT_BASE(0x8281000),
234          * we use CONFIG_SYS_UBOOT_BASE
235          * Otherwise, use the calculated address
236          */
237         end = get_imageset_end((void *)NULL, QSPI_NOR_DEV);
238         if (end <= CONFIG_SYS_UBOOT_BASE)
239                 end = CONFIG_SYS_UBOOT_BASE;
240         else
241                 end = ROUND(end, SZ_1K);
242
243         printf("Load image from NOR 0x%x\n", end);
244
245         return end;
246 }
247 #endif