2 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/system.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/mach-imx/hab.h>
16 /* -------- start of HAB API updates ------------*/
18 #define hab_rvt_report_event_p \
21 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
22 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
23 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
24 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
25 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
26 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
29 #define hab_rvt_report_status_p \
32 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
33 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
34 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
35 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
36 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
37 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
40 #define hab_rvt_authenticate_image_p \
43 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
44 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
45 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
46 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
47 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
48 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
51 #define hab_rvt_entry_p \
54 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
55 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
56 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
57 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
58 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
59 ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
62 #define hab_rvt_exit_p \
65 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
66 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
67 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
68 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
69 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
70 ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
73 static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
80 #define hab_rvt_check_target_p \
83 ((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
84 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
85 ((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
86 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
87 ((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
88 ((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET) \
91 #define ALIGN_SIZE 0x1000
92 #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
93 #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
94 #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
95 #define IS_HAB_ENABLED_BIT \
96 (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
97 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
99 static bool imx_hab_is_enabled(void);
101 static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr)
103 printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
104 ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);
109 static int verify_ivt_header(struct ivt_header *ivt_hdr)
113 if (ivt_hdr->magic != IVT_HEADER_MAGIC)
114 result = ivt_header_error("bad magic", ivt_hdr);
116 if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
117 result = ivt_header_error("bad length", ivt_hdr);
119 if (ivt_hdr->version != IVT_HEADER_V1 &&
120 ivt_hdr->version != IVT_HEADER_V2)
121 result = ivt_header_error("bad version", ivt_hdr);
126 #if !defined(CONFIG_SPL_BUILD)
128 #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
131 uint8_t tag; /* Tag */
132 uint8_t len[2]; /* Length */
133 uint8_t par; /* Version */
134 uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
138 static char *rsn_str[] = {
139 "RSN = HAB_RSN_ANY (0x00)\n",
140 "RSN = HAB_ENG_FAIL (0x30)\n",
141 "RSN = HAB_INV_ADDRESS (0x22)\n",
142 "RSN = HAB_INV_ASSERTION (0x0C)\n",
143 "RSN = HAB_INV_CALL (0x28)\n",
144 "RSN = HAB_INV_CERTIFICATE (0x21)\n",
145 "RSN = HAB_INV_COMMAND (0x06)\n",
146 "RSN = HAB_INV_CSF (0x11)\n",
147 "RSN = HAB_INV_DCD (0x27)\n",
148 "RSN = HAB_INV_INDEX (0x0F)\n",
149 "RSN = HAB_INV_IVT (0x05)\n",
150 "RSN = HAB_INV_KEY (0x1D)\n",
151 "RSN = HAB_INV_RETURN (0x1E)\n",
152 "RSN = HAB_INV_SIGNATURE (0x18)\n",
153 "RSN = HAB_INV_SIZE (0x17)\n",
154 "RSN = HAB_MEM_FAIL (0x2E)\n",
155 "RSN = HAB_OVR_COUNT (0x2B)\n",
156 "RSN = HAB_OVR_STORAGE (0x2D)\n",
157 "RSN = HAB_UNS_ALGORITHM (0x12)\n",
158 "RSN = HAB_UNS_COMMAND (0x03)\n",
159 "RSN = HAB_UNS_ENGINE (0x0A)\n",
160 "RSN = HAB_UNS_ITEM (0x24)\n",
161 "RSN = HAB_UNS_KEY (0x1B)\n",
162 "RSN = HAB_UNS_PROTOCOL (0x14)\n",
163 "RSN = HAB_UNS_STATE (0x09)\n",
168 static char *sts_str[] = {
169 "STS = HAB_SUCCESS (0xF0)\n",
170 "STS = HAB_FAILURE (0x33)\n",
171 "STS = HAB_WARNING (0x69)\n",
176 static char *eng_str[] = {
177 "ENG = HAB_ENG_ANY (0x00)\n",
178 "ENG = HAB_ENG_SCC (0x03)\n",
179 "ENG = HAB_ENG_RTIC (0x05)\n",
180 "ENG = HAB_ENG_SAHARA (0x06)\n",
181 "ENG = HAB_ENG_CSU (0x0A)\n",
182 "ENG = HAB_ENG_SRTC (0x0C)\n",
183 "ENG = HAB_ENG_DCP (0x1B)\n",
184 "ENG = HAB_ENG_CAAM (0x1D)\n",
185 "ENG = HAB_ENG_SNVS (0x1E)\n",
186 "ENG = HAB_ENG_OCOTP (0x21)\n",
187 "ENG = HAB_ENG_DTCP (0x22)\n",
188 "ENG = HAB_ENG_ROM (0x36)\n",
189 "ENG = HAB_ENG_HDCP (0x24)\n",
190 "ENG = HAB_ENG_RTL (0x77)\n",
191 "ENG = HAB_ENG_SW (0xFF)\n",
196 static char *ctx_str[] = {
197 "CTX = HAB_CTX_ANY(0x00)\n",
198 "CTX = HAB_CTX_FAB (0xFF)\n",
199 "CTX = HAB_CTX_ENTRY (0xE1)\n",
200 "CTX = HAB_CTX_TARGET (0x33)\n",
201 "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
202 "CTX = HAB_CTX_DCD (0xDD)\n",
203 "CTX = HAB_CTX_CSF (0xCF)\n",
204 "CTX = HAB_CTX_COMMAND (0xC0)\n",
205 "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
206 "CTX = HAB_CTX_ASSERT (0xA0)\n",
207 "CTX = HAB_CTX_EXIT (0xEE)\n",
212 static uint8_t hab_statuses[5] = {
220 static uint8_t hab_reasons[26] = {
249 static uint8_t hab_contexts[12] = {
254 HAB_CTX_AUTHENTICATE,
264 static uint8_t hab_engines[16] = {
283 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
286 uint8_t element = list[idx];
287 while (element != -1) {
290 element = list[++idx];
295 static void process_event_record(uint8_t *event_data, size_t bytes)
297 struct record *rec = (struct record *)event_data;
299 printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
300 printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
301 printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
302 printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
305 static void display_event(uint8_t *event_data, size_t bytes)
309 if (!(event_data && bytes > 0))
312 for (i = 0; i < bytes; i++) {
314 printf("\t0x%02x", event_data[i]);
315 else if ((i % 8) == 0)
316 printf("\n\t0x%02x", event_data[i]);
318 printf(" 0x%02x", event_data[i]);
321 process_event_record(event_data, bytes);
324 static int get_hab_status(void)
326 uint32_t index = 0; /* Loop index */
327 uint8_t event_data[128]; /* Event data buffer */
328 size_t bytes = sizeof(event_data); /* Event size in bytes */
329 enum hab_config config = 0;
330 enum hab_state state = 0;
331 hab_rvt_report_event_t *hab_rvt_report_event;
332 hab_rvt_report_status_t *hab_rvt_report_status;
334 hab_rvt_report_event = hab_rvt_report_event_p;
335 hab_rvt_report_status = hab_rvt_report_status_p;
337 if (imx_hab_is_enabled())
338 puts("\nSecure boot enabled\n");
340 puts("\nSecure boot disabled\n");
342 /* Check HAB status */
343 if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
344 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
347 /* Display HAB Error events */
348 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
349 &bytes) == HAB_SUCCESS) {
351 printf("--------- HAB Event %d -----------------\n",
353 puts("event data:\n");
354 display_event(event_data, bytes);
356 bytes = sizeof(event_data);
360 /* Display message if no HAB events are found */
362 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
364 puts("No HAB Events Found!\n\n");
369 static int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc,
382 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
385 ulong addr, length, ivt_offset;
389 return CMD_RET_USAGE;
391 addr = simple_strtoul(argv[1], NULL, 16);
392 length = simple_strtoul(argv[2], NULL, 16);
393 ivt_offset = simple_strtoul(argv[3], NULL, 16);
395 rcode = imx_hab_authenticate_image(addr, length, ivt_offset);
397 rcode = CMD_RET_SUCCESS;
399 rcode = CMD_RET_FAILURE;
405 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
406 "display HAB status",
411 hab_auth_img, 4, 0, do_authenticate_image,
412 "authenticate image via HAB",
413 "addr length ivt_offset\n"
414 "addr - image hex address\n"
415 "length - image hex length\n"
416 "ivt_offset - hex offset of IVT in the image"
420 #endif /* !defined(CONFIG_SPL_BUILD) */
422 static bool imx_hab_is_enabled(void)
424 struct imx_sec_config_fuse_t *fuse =
425 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
429 ret = fuse_read(fuse->bank, fuse->word, ®);
431 puts("\nSecure boot fuse read error\n");
435 return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
438 int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
441 uint32_t load_addr = 0;
443 uint32_t ivt_addr = 0;
446 hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
447 hab_rvt_entry_t *hab_rvt_entry;
448 hab_rvt_exit_t *hab_rvt_exit;
449 hab_rvt_check_target_t *hab_rvt_check_target;
451 struct ivt_header *ivt_hdr;
452 enum hab_status status;
454 hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
455 hab_rvt_entry = hab_rvt_entry_p;
456 hab_rvt_exit = hab_rvt_exit_p;
457 hab_rvt_check_target = hab_rvt_check_target_p;
459 if (!imx_hab_is_enabled()) {
460 puts("hab fuse not enabled\n");
464 printf("\nAuthenticate image from DDR location 0x%x...\n",
467 hab_caam_clock_enable(1);
469 /* Calculate IVT address header */
470 ivt_addr = ddr_start + ivt_offset;
471 ivt = (struct ivt *)ivt_addr;
474 /* Verify IVT header bugging out on error */
475 if (verify_ivt_header(ivt_hdr))
476 goto hab_caam_clock_disable;
478 /* Verify IVT body */
479 if (ivt->self != ivt_addr) {
480 printf("ivt->self 0x%08x pointer is 0x%08x\n",
481 ivt->self, ivt_addr);
482 goto hab_caam_clock_disable;
488 if (hab_rvt_entry() != HAB_SUCCESS) {
489 puts("hab entry function fail\n");
490 goto hab_exit_failure_print_status;
493 status = hab_rvt_check_target(HAB_TGT_MEMORY, (void *)ddr_start, bytes);
494 if (status != HAB_SUCCESS) {
495 printf("HAB check target 0x%08x-0x%08x fail\n",
496 ddr_start, ddr_start + bytes);
497 goto hab_exit_failure_print_status;
500 printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
501 printf("ivt entry = 0x%08x, dcd = 0x%08x, csf = 0x%08x\n", ivt->entry,
503 puts("Dumping IVT\n");
504 print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
506 puts("Dumping CSF Header\n");
507 print_buffer(ivt->csf, (void *)(ivt->csf), 4, 0x10, 0);
509 #if !defined(CONFIG_SPL_BUILD)
513 puts("\nCalling authenticate_image in ROM\n");
514 printf("\tivt_offset = 0x%x\n", ivt_offset);
515 printf("\tstart = 0x%08lx\n", start);
516 printf("\tbytes = 0x%x\n", bytes);
519 * If the MMU is enabled, we have to notify the ROM
520 * code, or it won't flush the caches when needed.
521 * This is done, by setting the "pu_irom_mmu_enabled"
522 * word to 1. You can find its address by looking in
523 * the ROM map. This is critical for
524 * authenticate_image(). If MMU is enabled, without
525 * setting this bit, authentication will fail and may
528 /* Check MMU enabled */
529 if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
532 * This won't work on Rev 1.0.0 of
533 * i.MX6Q/D, since their ROM doesn't
534 * do cache flushes. don't think any
535 * exist, so we ignore them.
538 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
539 } else if (is_mx6sdl()) {
540 writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
541 } else if (is_mx6sl()) {
542 writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
546 load_addr = (uint32_t)hab_rvt_authenticate_image(
548 ivt_offset, (void **)&start,
549 (size_t *)&bytes, NULL);
550 if (hab_rvt_exit() != HAB_SUCCESS) {
551 puts("hab exit function fail\n");
555 hab_exit_failure_print_status:
556 #if !defined(CONFIG_SPL_BUILD)
560 hab_caam_clock_disable:
561 hab_caam_clock_enable(0);