2 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/system.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/mach-imx/hab.h>
16 /* -------- start of HAB API updates ------------*/
18 #define hab_rvt_report_event_p \
21 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
22 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
23 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
24 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
25 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
26 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
29 #define hab_rvt_report_status_p \
32 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
33 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
34 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
35 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
36 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
37 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
40 #define hab_rvt_authenticate_image_p \
43 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
44 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
45 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
46 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
47 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
48 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
51 #define hab_rvt_entry_p \
54 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
55 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
56 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
57 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
58 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
59 ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
62 #define hab_rvt_exit_p \
65 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
66 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
67 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
68 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
69 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
70 ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
73 #define ALIGN_SIZE 0x1000
74 #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
75 #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
76 #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
77 #define IS_HAB_ENABLED_BIT \
78 (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
79 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
81 static bool is_hab_enabled(void);
83 static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr)
85 printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
86 ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);
91 static int verify_ivt_header(struct ivt_header *ivt_hdr)
95 if (ivt_hdr->magic != IVT_HEADER_MAGIC)
96 result = ivt_header_error("bad magic", ivt_hdr);
98 if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
99 result = ivt_header_error("bad length", ivt_hdr);
101 if (ivt_hdr->version != IVT_HEADER_V1 &&
102 ivt_hdr->version != IVT_HEADER_V2)
103 result = ivt_header_error("bad version", ivt_hdr);
108 #if !defined(CONFIG_SPL_BUILD)
110 #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
113 uint8_t tag; /* Tag */
114 uint8_t len[2]; /* Length */
115 uint8_t par; /* Version */
116 uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
120 char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
121 "RSN = HAB_ENG_FAIL (0x30)\n",
122 "RSN = HAB_INV_ADDRESS (0x22)\n",
123 "RSN = HAB_INV_ASSERTION (0x0C)\n",
124 "RSN = HAB_INV_CALL (0x28)\n",
125 "RSN = HAB_INV_CERTIFICATE (0x21)\n",
126 "RSN = HAB_INV_COMMAND (0x06)\n",
127 "RSN = HAB_INV_CSF (0x11)\n",
128 "RSN = HAB_INV_DCD (0x27)\n",
129 "RSN = HAB_INV_INDEX (0x0F)\n",
130 "RSN = HAB_INV_IVT (0x05)\n",
131 "RSN = HAB_INV_KEY (0x1D)\n",
132 "RSN = HAB_INV_RETURN (0x1E)\n",
133 "RSN = HAB_INV_SIGNATURE (0x18)\n",
134 "RSN = HAB_INV_SIZE (0x17)\n",
135 "RSN = HAB_MEM_FAIL (0x2E)\n",
136 "RSN = HAB_OVR_COUNT (0x2B)\n",
137 "RSN = HAB_OVR_STORAGE (0x2D)\n",
138 "RSN = HAB_UNS_ALGORITHM (0x12)\n",
139 "RSN = HAB_UNS_COMMAND (0x03)\n",
140 "RSN = HAB_UNS_ENGINE (0x0A)\n",
141 "RSN = HAB_UNS_ITEM (0x24)\n",
142 "RSN = HAB_UNS_KEY (0x1B)\n",
143 "RSN = HAB_UNS_PROTOCOL (0x14)\n",
144 "RSN = HAB_UNS_STATE (0x09)\n",
148 char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
149 "STS = HAB_FAILURE (0x33)\n",
150 "STS = HAB_WARNING (0x69)\n",
154 char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
155 "ENG = HAB_ENG_SCC (0x03)\n",
156 "ENG = HAB_ENG_RTIC (0x05)\n",
157 "ENG = HAB_ENG_SAHARA (0x06)\n",
158 "ENG = HAB_ENG_CSU (0x0A)\n",
159 "ENG = HAB_ENG_SRTC (0x0C)\n",
160 "ENG = HAB_ENG_DCP (0x1B)\n",
161 "ENG = HAB_ENG_CAAM (0x1D)\n",
162 "ENG = HAB_ENG_SNVS (0x1E)\n",
163 "ENG = HAB_ENG_OCOTP (0x21)\n",
164 "ENG = HAB_ENG_DTCP (0x22)\n",
165 "ENG = HAB_ENG_ROM (0x36)\n",
166 "ENG = HAB_ENG_HDCP (0x24)\n",
167 "ENG = HAB_ENG_RTL (0x77)\n",
168 "ENG = HAB_ENG_SW (0xFF)\n",
172 char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
173 "CTX = HAB_CTX_FAB (0xFF)\n",
174 "CTX = HAB_CTX_ENTRY (0xE1)\n",
175 "CTX = HAB_CTX_TARGET (0x33)\n",
176 "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
177 "CTX = HAB_CTX_DCD (0xDD)\n",
178 "CTX = HAB_CTX_CSF (0xCF)\n",
179 "CTX = HAB_CTX_COMMAND (0xC0)\n",
180 "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
181 "CTX = HAB_CTX_ASSERT (0xA0)\n",
182 "CTX = HAB_CTX_EXIT (0xEE)\n",
186 uint8_t hab_statuses[5] = {
194 uint8_t hab_reasons[26] = {
223 uint8_t hab_contexts[12] = {
228 HAB_CTX_AUTHENTICATE,
238 uint8_t hab_engines[16] = {
257 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
260 uint8_t element = list[idx];
261 while (element != -1) {
264 element = list[++idx];
269 void process_event_record(uint8_t *event_data, size_t bytes)
271 struct record *rec = (struct record *)event_data;
273 printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
274 printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
275 printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
276 printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
279 void display_event(uint8_t *event_data, size_t bytes)
283 if (!(event_data && bytes > 0))
286 for (i = 0; i < bytes; i++) {
288 printf("\t0x%02x", event_data[i]);
289 else if ((i % 8) == 0)
290 printf("\n\t0x%02x", event_data[i]);
292 printf(" 0x%02x", event_data[i]);
295 process_event_record(event_data, bytes);
298 int get_hab_status(void)
300 uint32_t index = 0; /* Loop index */
301 uint8_t event_data[128]; /* Event data buffer */
302 size_t bytes = sizeof(event_data); /* Event size in bytes */
303 enum hab_config config = 0;
304 enum hab_state state = 0;
305 hab_rvt_report_event_t *hab_rvt_report_event;
306 hab_rvt_report_status_t *hab_rvt_report_status;
308 hab_rvt_report_event = hab_rvt_report_event_p;
309 hab_rvt_report_status = hab_rvt_report_status_p;
311 if (is_hab_enabled())
312 puts("\nSecure boot enabled\n");
314 puts("\nSecure boot disabled\n");
316 /* Check HAB status */
317 if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
318 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
321 /* Display HAB Error events */
322 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
323 &bytes) == HAB_SUCCESS) {
325 printf("--------- HAB Event %d -----------------\n",
327 puts("event data:\n");
328 display_event(event_data, bytes);
330 bytes = sizeof(event_data);
334 /* Display message if no HAB events are found */
336 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
338 puts("No HAB Events Found!\n\n");
343 int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
355 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
358 ulong addr, length, ivt_offset;
362 return CMD_RET_USAGE;
364 addr = simple_strtoul(argv[1], NULL, 16);
365 length = simple_strtoul(argv[2], NULL, 16);
366 ivt_offset = simple_strtoul(argv[3], NULL, 16);
368 rcode = authenticate_image(addr, length, ivt_offset);
370 rcode = CMD_RET_SUCCESS;
372 rcode = CMD_RET_FAILURE;
378 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
379 "display HAB status",
384 hab_auth_img, 4, 0, do_authenticate_image,
385 "authenticate image via HAB",
386 "addr length ivt_offset\n"
387 "addr - image hex address\n"
388 "length - image hex length\n"
389 "ivt_offset - hex offset of IVT in the image"
393 #endif /* !defined(CONFIG_SPL_BUILD) */
395 static bool is_hab_enabled(void)
397 struct imx_sec_config_fuse_t *fuse =
398 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
402 ret = fuse_read(fuse->bank, fuse->word, ®);
404 puts("\nSecure boot fuse read error\n");
408 return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
411 int authenticate_image(uint32_t ddr_start, uint32_t image_size,
414 uint32_t load_addr = 0;
416 uint32_t ivt_addr = 0;
419 hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
420 hab_rvt_entry_t *hab_rvt_entry;
421 hab_rvt_exit_t *hab_rvt_exit;
423 struct ivt_header *ivt_hdr;
425 hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
426 hab_rvt_entry = hab_rvt_entry_p;
427 hab_rvt_exit = hab_rvt_exit_p;
429 if (!is_hab_enabled()) {
430 puts("hab fuse not enabled\n");
434 printf("\nAuthenticate image from DDR location 0x%x...\n",
437 hab_caam_clock_enable(1);
439 /* Calculate IVT address header */
440 ivt_addr = ddr_start + ivt_offset;
441 ivt = (struct ivt *)ivt_addr;
444 /* Verify IVT header bugging out on error */
445 if (verify_ivt_header(ivt_hdr))
446 goto hab_caam_clock_disable;
448 /* Verify IVT body */
449 if (ivt->self != ivt_addr) {
450 printf("ivt->self 0x%08x pointer is 0x%08x\n",
451 ivt->self, ivt_addr);
452 goto hab_caam_clock_disable;
458 if (hab_rvt_entry() != HAB_SUCCESS) {
459 puts("hab entry function fail\n");
460 goto hab_caam_clock_disable;
464 printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
465 puts("Dumping IVT\n");
466 print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
468 puts("Dumping CSF Header\n");
469 print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
472 #if !defined(CONFIG_SPL_BUILD)
476 puts("\nCalling authenticate_image in ROM\n");
477 printf("\tivt_offset = 0x%x\n", ivt_offset);
478 printf("\tstart = 0x%08lx\n", start);
479 printf("\tbytes = 0x%x\n", bytes);
482 * If the MMU is enabled, we have to notify the ROM
483 * code, or it won't flush the caches when needed.
484 * This is done, by setting the "pu_irom_mmu_enabled"
485 * word to 1. You can find its address by looking in
486 * the ROM map. This is critical for
487 * authenticate_image(). If MMU is enabled, without
488 * setting this bit, authentication will fail and may
491 /* Check MMU enabled */
492 if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
495 * This won't work on Rev 1.0.0 of
496 * i.MX6Q/D, since their ROM doesn't
497 * do cache flushes. don't think any
498 * exist, so we ignore them.
501 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
502 } else if (is_mx6sdl()) {
503 writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
504 } else if (is_mx6sl()) {
505 writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
509 load_addr = (uint32_t)hab_rvt_authenticate_image(
511 ivt_offset, (void **)&start,
512 (size_t *)&bytes, NULL);
513 if (hab_rvt_exit() != HAB_SUCCESS) {
514 puts("hab exit function fail\n");
518 hab_caam_clock_disable:
519 hab_caam_clock_enable(0);
521 #if !defined(CONFIG_SPL_BUILD)