2 * i.MX6 nand boot control block(bcb).
4 * Based on the common/imx-bbu-nand-fcb.c from barebox and imx kobs-ng
6 * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
7 * Copyright (C) 2016 Sergey Kubushyn <ksi@koi8.net>
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <dm/devres.h>
18 #include <jffs2/jffs2.h>
19 #include <linux/bch.h>
20 #include <linux/mtd/mtd.h>
22 #include <asm/arch/sys_proto.h>
23 #include <asm/mach-imx/imx-nandbcb.h>
24 #include <asm/mach-imx/imximage.cfg>
26 #include <linux/mtd/mtd.h>
29 #include "../../../cmd/legacy-mtd-utils.h"
31 #define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET)
32 #define GETBIT(v, n) (((v) >> (n)) & 0x1)
33 #define IMX8MQ_SPL_SZ 0x3e000
34 #define IMX8MQ_HDMI_FW_SZ 0x19c00
36 #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
37 static uint8_t reverse_bit(uint8_t b)
39 b = (b & 0xf0) >> 4 | (b & 0x0f) << 4;
40 b = (b & 0xcc) >> 2 | (b & 0x33) << 2;
41 b = (b & 0xaa) >> 1 | (b & 0x55) << 1;
46 static void encode_bch_ecc(void *buf, struct fcb_block *fcb, int eccbits)
51 int ecc_buf_size = (m * eccbits + 7) / 8;
52 struct bch_control *bch = init_bch(m, eccbits, 0);
53 u8 *ecc_buf = kzalloc(ecc_buf_size, GFP_KERNEL);
54 u8 *tmp_buf = kzalloc(blocksize * numblocks, GFP_KERNEL);
58 * The blocks here are bit aligned. If eccbits is a multiple of 8,
59 * we just can copy bytes. Otherwiese we must move the blocks to
60 * the next free bit position.
64 memcpy(tmp_buf, fcb, sizeof(*fcb));
66 for (i = 0; i < numblocks; i++) {
67 memset(ecc_buf, 0, ecc_buf_size);
68 psrc = tmp_buf + i * blocksize;
69 pdst = buf + i * (blocksize + ecc_buf_size);
71 /* copy data byte aligned to destination buf */
72 memcpy(pdst, psrc, blocksize);
75 * imx-kobs use a modified encode_bch which reverse the
76 * bit order of the data before calculating bch.
77 * Do this in the buffer and use the bch lib here.
79 for (j = 0; j < blocksize; j++)
80 psrc[j] = reverse_bit(psrc[j]);
82 encode_bch(bch, psrc, blocksize, ecc_buf);
85 for (j = 0; j < ecc_buf_size; j++)
86 ecc_buf[j] = reverse_bit(ecc_buf[j]);
88 /* Here eccbuf is byte aligned and we can just copy it */
89 memcpy(pdst + blocksize, ecc_buf, ecc_buf_size);
98 static u8 calculate_parity_13_8(u8 d)
102 p |= (GETBIT(d, 6) ^ GETBIT(d, 5) ^ GETBIT(d, 3) ^ GETBIT(d, 2)) << 0;
103 p |= (GETBIT(d, 7) ^ GETBIT(d, 5) ^ GETBIT(d, 4) ^ GETBIT(d, 2) ^
105 p |= (GETBIT(d, 7) ^ GETBIT(d, 6) ^ GETBIT(d, 5) ^ GETBIT(d, 1) ^
107 p |= (GETBIT(d, 7) ^ GETBIT(d, 4) ^ GETBIT(d, 3) ^ GETBIT(d, 0)) << 3;
108 p |= (GETBIT(d, 6) ^ GETBIT(d, 4) ^ GETBIT(d, 3) ^ GETBIT(d, 2) ^
109 GETBIT(d, 1) ^ GETBIT(d, 0)) << 4;
114 static void encode_hamming_13_8(void *_src, void *_ecc, size_t size)
120 for (i = 0; i < size; i++)
121 ecc[i] = calculate_parity_13_8(src[i]);
125 static u32 calc_chksum(void *buf, size_t size)
131 for (i = 0; i < size; i++)
137 static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd,
138 u32 fw1_start, u32 fw2_start, u32 fw_pages)
140 struct nand_chip *chip = mtd_to_nand(mtd);
141 struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
142 struct mxs_nand_layout l;
144 mxs_nand_get_layout(mtd, &l);
146 fcb->fingerprint = FCB_FINGERPRINT;
147 fcb->version = FCB_VERSION_1;
149 fcb->pagesize = mtd->writesize;
150 fcb->oob_pagesize = mtd->writesize + mtd->oobsize;
151 fcb->sectors = mtd->erasesize / mtd->writesize;
153 fcb->meta_size = l.meta_size;
154 fcb->nr_blocks = l.nblocks;
155 fcb->ecc_nr = l.data0_size;
156 fcb->ecc_level = l.ecc0;
157 fcb->ecc_size = l.datan_size;
158 fcb->ecc_type = l.eccn;
159 fcb->bchtype = l.gf_len;
161 /* Also hardcoded in kobs-ng */
162 if (is_mx6() || is_imx8m()) {
165 fcb->addr_setup = 25;
166 fcb->dsample_time = 6;
167 } else if (is_mx7()) {
170 fcb->addr_setup = 15;
171 fcb->dsample_time = 6;
174 /* DBBT search area starts at second page on first block */
177 fcb->bb_byte = nand_info->bch_geometry.block_mark_byte_offset;
178 fcb->bb_start_bit = nand_info->bch_geometry.block_mark_bit_offset;
180 fcb->phy_offset = mtd->writesize;
182 fcb->nr_blocks = mtd->writesize / fcb->ecc_nr - 1;
185 fcb->disbbm_search = 0;
187 fcb->fw1_start = fw1_start; /* Firmware image starts on this sector */
188 fcb->fw2_start = fw2_start; /* Secondary FW Image starting Sector */
189 fcb->fw1_pages = fw_pages; /* Number of sectors in firmware image */
190 fcb->fw2_pages = fw_pages; /* Number of sector in secondary FW image */
192 fcb->checksum = calc_chksum((void *)fcb + 4, sizeof(*fcb) - 4);
195 static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks)
197 int n, n_bad_blocks = 0;
199 u32 *n_bad_blocksp = buf + 0x4;
201 for (n = 0; n < num_blocks; n++) {
202 loff_t offset = n * mtd->erasesize;
203 if (mtd_block_isbad(mtd, offset)) {
210 *n_bad_blocksp = n_bad_blocks;
215 static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb,
216 struct dbbt_block *dbbt, void *dbbt_data_page,
219 void *fcb_raw_page = 0;
224 * We prepare raw page only for i.MX6, for i.MX7 we
225 * leverage BCH hw module instead
229 fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize,
232 debug("failed to allocate fcb_raw_page\n");
237 #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
238 /* 40 bit BCH, for i.MX6UL(L) */
239 encode_bch_ecc(fcb_raw_page + 32, fcb, 40);
241 memcpy(fcb_raw_page + 12, fcb, sizeof(struct fcb_block));
242 encode_hamming_13_8(fcb_raw_page + 12,
243 fcb_raw_page + 12 + 512, 512);
246 * Set the first and second byte of OOB data to 0xFF,
247 * not 0x00. These bytes are used as the Manufacturers Bad
248 * Block Marker (MBBM). Since the FCB is mostly written to
249 * the first page in a block, a scan for
250 * factory bad blocks will detect these blocks as bad, e.g.
251 * when function nand_scan_bbt() is executed to build a new
254 memset(fcb_raw_page + mtd->writesize, 0xFF, 2);
256 for (i = 0; i < 2; i++) {
257 if (mtd_block_isbad(mtd, off)) {
258 printf("Block %d is bad, skipped\n", i);
263 * User BCH ECC hardware module for i.MX7
265 if (is_mx7() || is_imx8m()) {
266 u32 off = i * mtd->erasesize;
267 size_t rwsize = sizeof(*fcb);
269 printf("Writing %zd bytes to 0x%x: ", rwsize, off);
271 /* switch nand BCH to FCB compatible settings */
272 mxs_nand_mode_fcb(mtd);
273 ret = nand_write(mtd, off, &rwsize,
274 (unsigned char *)fcb);
275 mxs_nand_mode_normal(mtd);
277 printf("%s\n", ret ? "ERROR" : "OK");
278 } else if (is_mx6()) {
280 mtd_oob_ops_t ops = {
281 .datbuf = (u8 *)fcb_raw_page,
282 .oobbuf = ((u8 *)fcb_raw_page) +
284 .len = mtd->writesize,
285 .ooblen = mtd->oobsize,
289 ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops);
291 goto fcb_raw_page_err;
292 debug("NAND fcb write: 0x%x offset 0x%zx written: %s\n",
293 mtd->erasesize * i, ops.len, ret ?
297 ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize,
298 mtd->writesize, &dummy, (void *)dbbt);
300 goto fcb_raw_page_err;
301 debug("NAND dbbt write: 0x%x offset, 0x%zx bytes written: %s\n",
302 mtd->erasesize * i + mtd->writesize, dummy,
303 ret ? "ERROR" : "OK");
305 /* dbbtpages == 0 if no bad blocks */
306 if (dbbt->dbbtpages > 0) {
307 loff_t to = (mtd->erasesize * i + mtd->writesize * 5);
309 ret = mtd_write(mtd, to, mtd->writesize, &dummy,
312 goto fcb_raw_page_err;
323 static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
324 size_t maxsize, const u_char *buf)
326 nand_erase_options_t opts;
327 struct fcb_block *fcb;
328 struct dbbt_block *dbbt;
330 void *fwbuf, *dbbt_page, *dbbt_data_page;
331 u32 fw1_start, fw1_pages;
332 int nr_blks, nr_blks_fcb, fw1_blk;
337 loff_t extra_fw1_off;
340 memset(&opts, 0, sizeof(opts));
342 opts.length = maxsize - 1;
343 ret = nand_erase_opts(mtd, &opts);
345 printf("%s: erase failed (ret = %d)\n", __func__, ret);
350 * Reference documentation from i.MX6DQRM section 8.5.2.2
352 * Nand Boot Control Block(BCB) contains two data structures,
353 * - Firmware Configuration Block(FCB)
354 * - Discovered Bad Block Table(DBBT)
358 * - DBBT search page address,
359 * - start page address of primary firmware
360 * - start page address of secondary firmware
363 * - number of blocks = mtd partition size / mtd erasesize
364 * - two firmware blocks, primary and secondary
365 * - first 4 block for FCB/DBBT
366 * - rest split in half for primary and secondary firmware
367 * - same firmware will write two times
370 nr_blks = maxsize / mtd->erasesize;
371 fw1_blk = nr_blks_fcb;
375 if (is_mx6() || is_mx7()) {
376 fwsize = ALIGN(size + FLASH_OFFSET_STANDARD + mtd->writesize,
378 fwbuf = kzalloc(fwsize, GFP_KERNEL);
380 debug("failed to allocate fwbuf\n");
385 memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, size);
386 fw1_off = fw1_blk * mtd->erasesize;
387 ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize,
388 (u_char *)fwbuf, WITH_WR_VERIFY);
389 printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n",
390 fw1_off, fwsize, ret ? "ERROR" : "OK");
393 } else if (is_imx8m()) {
394 fwsize = ALIGN(IMX8MQ_SPL_SZ + FLASH_OFFSET_STANDARD + mtd->writesize, mtd->writesize);
395 fwbuf = kzalloc(fwsize, GFP_KERNEL);
397 printf("failed to allocate fwbuf\n");
402 memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, IMX8MQ_SPL_SZ);
403 fw1_off = fw1_blk * mtd->erasesize;
404 ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize,
405 (u_char *)fwbuf, WITH_WR_VERIFY);
406 printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n",
407 fw1_off, fwsize, ret ? "ERROR" : "OK");
411 extra_fwsize = ALIGN(IMX8MQ_SPL_SZ + mtd->writesize, mtd->writesize);
412 extra_fwbuf = kzalloc(extra_fwsize, GFP_KERNEL);
413 extra_fw1_off = fw1_off + mtd->erasesize * ((IMX8MQ_SPL_SZ + mtd->erasesize - 1) / mtd->erasesize);
415 printf("failed to allocate fwbuf\n");
420 memcpy(extra_fwbuf, buf + IMX8MQ_HDMI_FW_SZ, IMX8MQ_SPL_SZ);
421 ret = nand_write_skip_bad(mtd, extra_fw1_off, &extra_fwsize, NULL, maxsize,
422 (u_char *)extra_fwbuf, WITH_WR_VERIFY);
423 printf("NAND extra_fw write: 0x%llx offset, 0x%zx bytes written: %s\n",
424 extra_fw1_off, extra_fwsize, ret ? "ERROR" : "OK");
432 fcb = kzalloc(sizeof(*fcb), GFP_KERNEL);
434 debug("failed to allocate fcb\n");
439 fw1_start = (fw1_blk * mtd->erasesize) / mtd->writesize;
440 fw1_pages = size / mtd->writesize + 1;
442 fw1_pages = (IMX8MQ_SPL_SZ + (mtd->writesize - 1)) / mtd->writesize;
443 fill_fcb(fcb, mtd, fw1_start, 0, fw1_pages);
446 dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL);
448 debug("failed to allocate dbbt_page\n");
453 dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL);
454 if (!dbbt_data_page) {
455 debug("failed to allocate dbbt_data_page\n");
462 dbbt->fingerprint = DBBT_FINGERPRINT2;
463 dbbt->version = DBBT_VERSION_1;
464 ret = dbbt_fill_data(mtd, dbbt_data_page, nr_blks);
466 goto dbbt_data_page_err;
470 /* write fcb and dbbt to nand */
471 ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, off);
473 printf("failed to write FCB/DBBT\n");
476 kfree(dbbt_data_page);
487 static int do_nandbcb_bcbonly(int argc, char * const argv[])
489 struct fcb_block *fcb;
490 struct dbbt_block *dbbt;
491 u32 fw_len, fw1_off, fw2_off;
492 struct mtd_info *mtd;
493 void *dbbt_page, *dbbt_data_page;
496 dev = nand_curr_device;
497 if ((dev < 0) || (dev >= CONFIG_SYS_MAX_NAND_DEVICE) ||
498 (!get_nand_dev_by_index(dev))) {
499 puts("No devices available\n");
500 return CMD_RET_FAILURE;
503 mtd = get_nand_dev_by_index(dev);
506 return CMD_RET_FAILURE;
508 fw_len = simple_strtoul(argv[1], NULL, 16);
509 fw1_off = simple_strtoul(argv[2], NULL, 16);
512 fw2_off = simple_strtoul(argv[3], NULL, 16);
517 fcb = kzalloc(sizeof(*fcb), GFP_KERNEL);
519 debug("failed to allocate fcb\n");
521 return CMD_RET_FAILURE;
524 fill_fcb(fcb, mtd, fw1_off / mtd->writesize,
525 fw2_off / mtd->writesize, fw_len / mtd->writesize);
528 dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL);
530 debug("failed to allocate dbbt_page\n");
535 dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL);
536 if (!dbbt_data_page) {
537 debug("failed to allocate dbbt_data_page\n");
544 dbbt->fingerprint = DBBT_FINGERPRINT2;
545 dbbt->version = DBBT_VERSION_1;
546 ret = dbbt_fill_data(mtd, dbbt_data_page, 0);
548 goto dbbt_data_page_err;
552 /* write fcb and dbbt to nand */
553 ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, 0);
555 kfree(dbbt_data_page);
562 printf("failed to write FCB/DBBT\n");
563 return CMD_RET_FAILURE;
566 return CMD_RET_SUCCESS;
569 static int do_nandbcb_update(int argc, char * const argv[])
571 struct mtd_info *mtd;
572 loff_t addr, offset, size, maxsize;
579 return CMD_RET_USAGE;
581 dev = nand_curr_device;
583 printf("failed to get nand_curr_device, run nand device\n");
584 return CMD_RET_FAILURE;
587 addr = simple_strtoul(argv[1], &endp, 16);
588 if (*argv[1] == 0 || *endp != 0)
589 return CMD_RET_FAILURE;
591 mtd = get_nand_dev_by_index(dev);
592 if (mtd_arg_off_size(argc - 2, argv + 2, &dev, &offset, &size,
593 &maxsize, MTD_DEV_TYPE_NAND, mtd->size))
594 return CMD_RET_FAILURE;
596 buf = map_physmem(addr, size, MAP_WRBACK);
598 puts("failed to map physical memory\n");
599 return CMD_RET_FAILURE;
602 ret = nandbcb_update(mtd, offset, size, maxsize, buf);
604 return ret == 0 ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
607 static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc,
620 if (strcmp(cmd, "update") == 0) {
621 ret = do_nandbcb_update(argc, argv);
625 if (strcmp(cmd, "bcbonly") == 0) {
626 ret = do_nandbcb_bcbonly(argc, argv);
634 return CMD_RET_USAGE;
637 #ifdef CONFIG_SYS_LONGHELP
638 static char nandbcb_help_text[] =
639 "update addr off|partition len - update 'len' bytes starting at\n"
640 " 'off|part' to memory address 'addr', skipping bad blocks\n"
641 "bcbonly fw-size fw1-off [fw2-off] - write only BCB (FCB and DBBT)\n"
642 " where `fw-size` is fw sizes in bytes, `fw1-off`\n"
643 " and `fw2-off` - firmware offsets\n"
644 " FIY, BCB isn't erased automatically, so mtd erase should\n"
645 " be called in advance before writing new BCB:\n"
646 " > mtd erase mx7-bcb";
649 U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb,
650 "i.MX6/i.MX7 NAND Boot Control Blocks write",