1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2012 The Chromium OS Authors.
6 #ifndef __ASM_ARCH_EXYNOS_SPL_H__
7 #define __ASM_ARCH_EXYNOS_SPL_H__
9 #include <asm/arch/dmc.h>
10 #include <asm/arch/power.h>
13 /* Parameters of early board initialization in SPL */
14 struct spl_machine_param {
15 /* Add fields as and when required */
17 u32 version; /* Version number */
18 u32 size; /* Size of block */
20 * Parameters we expect, in order, terminated with \0. Each parameter
21 * is a single character representing one 32-bit word in this
24 * Valid characters in this string are:
31 * f frequency_mhz (memory frequency in MHz)
32 * a ARM clock frequency in MHz
33 * s serial base address
34 * i i2c base address for early access (meant for PMIC)
35 * r board rev GPIO numbers used to read board revision
36 * (lower halfword=bit 0, upper=bit 1)
37 * M Memory Manufacturer name
40 char params[12]; /* Length must be word-aligned */
41 u32 mem_iv_size; /* Memory channel interleaving size */
42 enum ddr_mode mem_type; /* Type of on-board memory */
44 * U-Boot size - The iROM mmc copy function used by the SPL takes a
45 * block count paramter to describe the U-Boot size unlike the spi
46 * boot copy function which just uses the U-Boot size directly. Align
47 * the U-Boot size to block size (512 bytes) when populating the SPL
48 * table only for mmc boot.
51 unsigned boot_source; /* Boot device */
52 unsigned frequency_mhz; /* Frequency of memory in MHz */
53 unsigned arm_freq_mhz; /* ARM Frequency in MHz */
54 u32 serial_base; /* Serial base address */
55 u32 i2c_base; /* i2c base address */
56 u32 board_rev_gpios; /* Board revision GPIOs */
57 enum mem_manuf mem_manuf; /* Memory Manufacturer */
58 } __attribute__((__packed__));
62 * Validate signature and return a pointer to the parameter table. If the
63 * signature is invalid, call panic() and never return.
65 * @return pointer to the parameter table if signature matched or never return.
67 struct spl_machine_param *spl_get_machine_params(void);
69 #endif /* __ASM_ARCH_EXYNOS_SPL_H__ */