1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Clock initialization routines
5 * Copyright (c) 2011 The Chromium OS Authors.
8 #ifndef __EXYNOS_CLOCK_INIT_H
9 #define __EXYNOS_CLOCK_INIT_H
12 #ifdef CONFIG_EXYNOS5420
13 MEM_TIMINGS_MSR_COUNT = 5,
15 MEM_TIMINGS_MSR_COUNT = 4,
19 /* These are the ratio's for configuring ARM clock */
20 struct arm_clk_ratios {
21 unsigned arm_freq_mhz; /* Frequency of ARM core in MHz */
29 unsigned pclk_dbg_ratio;
31 unsigned periph_ratio;
37 /* These are the memory timings for a particular memory type and speed */
39 enum mem_manuf mem_manuf; /* Memory manufacturer */
40 enum ddr_mode mem_type; /* Memory type */
41 unsigned frequency_mhz; /* Frequency of memory in MHz */
43 /* Here follow the timing parameters for the selected memory */
80 unsigned pclk_cdrex_ratio;
81 unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT];
86 unsigned timing_power;
88 /* DQS, DQ, DEBUG offsets */
95 unsigned phy0_pulld_dqs;
96 unsigned phy1_pulld_dqs;
98 unsigned lpddr3_ctrl_phy_reset;
99 unsigned ctrl_start_point;
102 unsigned ctrl_dll_on;
107 unsigned ctrl_bstlen;
111 unsigned dfi_init_start;
116 unsigned zq_mode_dds;
117 unsigned zq_mode_term;
118 unsigned zq_mode_noterm; /* 1 to allow termination disable */
123 unsigned membaseconfig0;
124 unsigned membaseconfig1;
125 unsigned prechconfig_tp_cnt;
129 /* Channel and Chip Selection */
130 uint8_t dmc_channels; /* number of memory channels */
131 uint8_t chips_per_channel; /* number of chips per channel */
132 uint8_t chips_to_configure; /* number of chips to configure */
133 uint8_t send_zq_init; /* 1 to send this command */
134 unsigned impedance; /* drive strength impedeance */
135 uint8_t gate_leveling_enable; /* check gate leveling is enabled */
136 uint8_t read_leveling_enable; /* check h/w read leveling is enabled */
140 * Get the correct memory timings for our selected memory type and speed.
142 * This function can be called from SPL or the main U-Boot.
144 * @return pointer to the memory timings that we should use
146 struct mem_timings *clock_get_mem_timings(void);
149 * Initialize clock for the device
151 void system_clock_init(void);
154 * Set clock divisor value for booting from EMMC.
156 void emmc_boot_clk_div_set(void);