4 prompt "DaVinci board select"
9 select MACH_DAVINCI_DA850_EVM
13 config TARGET_DA850EVM
14 bool "DA850 EVM board"
15 select MACH_DAVINCI_DA850_EVM
21 select MACH_DAVINCI_DA850_EVM
23 select BOARD_LATE_INIT
25 config TARGET_OMAPL138_LCDK
30 config TARGET_CALIMAIN
35 bool "LEGO MINDSTORMS EV3"
36 select MACH_DAVINCI_DA850_EVM
45 bool "Enable Lowlevel DA850 initialization"
48 config SYS_DA850_PLL_INIT
51 config SYS_DA850_DDR_INIT
57 select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
61 select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
63 config MACH_DAVINCI_DA850_EVM
67 comment "DA850 PLL Initialization Parameters"
70 int "PLLCTL Clock Mode"
71 default 0 if SOC_DA850
73 Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
75 config SYS_DA850_PLL0_POSTDIV
76 int "PLLC0 PLL Post-Divider"
77 default 1 if SOC_DA850
79 Value written to PLLC0 PLL Post-Divider Control Register
81 config SYS_DA850_PLL0_PLLDIV1
83 default 0x8000 if SOC_DA850
85 Value written to PLLC0 Divider 1 register
87 config SYS_DA850_PLL0_PLLDIV2
89 default 0x8001 if SOC_DA850
91 Value written to PLLC0 Divider 2 register
93 config SYS_DA850_PLL0_PLLDIV3
95 default 0x8002 if SOC_DA850
97 Value written to PLLC0 Divider 3 register
99 config SYS_DA850_PLL0_PLLDIV4
100 hex "PLLC0 Divider 4"
101 default 0x8003 if SOC_DA850
103 Value written to PLLC0 Divider 4 register
105 config SYS_DA850_PLL0_PLLDIV5
106 hex "PLLC0 Divider 5"
107 default 0x8002 if SOC_DA850
109 Value written to PLLC0 Divider 5 register
111 config SYS_DA850_PLL0_PLLDIV6
112 hex "PLLC0 Divider 6"
113 default 0x8000 if SOC_DA850
115 Value written to PLLC0 Divider 6 register
117 config SYS_DA850_PLL0_PLLDIV7
118 hex "PLLC0 Divider 7"
119 default 0x8005 if SOC_DA850
121 Value written to PLLC0 Divider 7 register
123 config SYS_DA850_PLL1_POSTDIV
124 hex "PLLC1 PLL Post-Divider"
125 default 1 if SOC_DA850
127 Value written to PLLC1 PLL Post-Divider Control Register
129 config SYS_DA850_PLL1_PLLDIV1
130 hex "PLLC1 Divider 2"
131 default 0x8000 if SOC_DA850
133 Value written to PLLC1 Divider 1 register
135 config SYS_DA850_PLL1_PLLDIV2
136 hex "PLLC1 Divider 2"
137 default 0x8001 if SOC_DA850
139 Value written to PLLC1 Divider 2 register
141 config SYS_DA850_PLL1_PLLDIV3
142 hex "PLLC1 Divider 3"
143 default 0x8002 if SOC_DA850
145 Value written to PLLC1 Divider 3 register
149 source "board/Barix/ipam390/Kconfig"
150 source "board/davinci/da8xxevm/Kconfig"
151 source "board/davinci/ea20/Kconfig"
152 source "board/omicron/calimain/Kconfig"
153 source "board/lego/ev3/Kconfig"
156 default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390
157 default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"