2 * vectors - Generic ARM exception table code
4 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
13 * SPDX-License-Identifier: GPL-2.0+
19 * A macro to allow insertion of an ARM exception vector either
20 * for the non-boot0 case or by a boot0-header.
24 ldr pc, _undefined_instruction
25 ldr pc, _software_interrupt
26 ldr pc, _prefetch_abort
35 *************************************************************************
37 * Symbol _start is referenced elsewhere, so make it global
39 *************************************************************************
45 *************************************************************************
47 * Vectors have their own section so linker script can map them easily
49 *************************************************************************
52 .section ".vectors", "ax"
54 #if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
56 * Various SoCs need something special and SoC-specific up front in
57 * order to boot, allow them to set that in their boot0.h file and then
60 * To allow a boot0 hook to insert a 'special' sequence after the vector
61 * table (e.g. for the socfpga), the presence of a boot0 hook supresses
62 * the below vector table and assumes that the vector table is filled in
63 * by the boot0 hook. The requirements for a boot0 hook thus are:
64 * (1) defines '_start:' as appropriate
65 * (2) inserts the vector table using ARM_VECTORS as appropriate
67 #include <asm/arch/boot0.h>
72 *************************************************************************
74 * Exception vectors as described in ARM reference manuals
76 * Uses indirect branch to allow reaching handlers anywhere in memory.
78 *************************************************************************
82 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
83 .word CONFIG_SYS_DV_NOR_BOOT_CFG
86 #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
89 *************************************************************************
91 * Indirect vectors table
93 * Symbols referenced here must be defined somewhere else
95 *************************************************************************
98 .globl _undefined_instruction
99 .globl _software_interrupt
100 .globl _prefetch_abort
106 _undefined_instruction: .word undefined_instruction
107 _software_interrupt: .word software_interrupt
108 _prefetch_abort: .word prefetch_abort
109 _data_abort: .word data_abort
110 _not_used: .word not_used
114 .balignl 16,0xdeadbeef
117 *************************************************************************
121 *************************************************************************
124 /* SPL interrupt handling: just hang */
126 #ifdef CONFIG_SPL_BUILD
129 undefined_instruction:
137 bl 1b /* hang and never return */
139 #else /* !CONFIG_SPL_BUILD */
141 /* IRQ stack memory (calculated at run-time) + 8 bytes */
142 .globl IRQ_STACK_START_IN
144 #ifdef IRAM_BASE_ADDR
145 .word IRAM_BASE_ADDR + 0x20
153 #define S_FRAME_SIZE 72
175 #define MODE_SVC 0x13
179 * use bad_save_user_regs for abort/prefetch/undef/swi ...
180 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
183 .macro bad_save_user_regs
184 @ carve out a frame on current user stack
185 sub sp, sp, #S_FRAME_SIZE
186 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
187 ldr r2, IRQ_STACK_START_IN
188 @ get values for "aborted" pc and cpsr (into parm regs)
190 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
193 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
194 mov r0, sp @ save current stack into r0 (param register)
197 .macro irq_save_user_regs
198 sub sp, sp, #S_FRAME_SIZE
199 stmia sp, {r0 - r12} @ Calling r0-r12
200 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
202 stmdb r8, {sp, lr}^ @ Calling SP, LR
203 str lr, [r8, #0] @ Save calling PC
205 str r6, [r8, #4] @ Save CPSR
206 str r0, [r8, #8] @ Save OLD_R0
210 .macro irq_restore_user_regs
211 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
213 ldr lr, [sp, #S_PC] @ Get PC
214 add sp, sp, #S_FRAME_SIZE
215 subs pc, lr, #4 @ return & move spsr_svc into cpsr
219 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
221 str lr, [r13] @ save caller lr in position 0 of saved stack
222 mrs lr, spsr @ get the spsr
223 str lr, [r13, #4] @ save spsr in position 1 of saved stack
224 mov r13, #MODE_SVC @ prepare SVC-Mode
226 msr spsr, r13 @ switch modes, make sure moves will execute
227 mov lr, pc @ capture return pc
228 movs pc, lr @ jump to next instruction & switch modes.
231 .macro get_irq_stack @ setup IRQ stack
232 ldr sp, IRQ_STACK_START
235 .macro get_fiq_stack @ setup FIQ stack
236 ldr sp, FIQ_STACK_START
244 undefined_instruction:
247 bl do_undefined_instruction
253 bl do_software_interrupt
286 #endif /* CONFIG_SPL_BUILD */